Kabushiki Kaisha Toshiba

Takeo Furuhata

Takashi Nakao

Ichiro Mizushima

Masayuki Tanaka

Kazuhiro Matsuo

Koji Nakahara

Akiko Sekihara

Yukihiro Ushiku

Shuichi Samata

Motoya Kishida

Tsubasa Harada

Yoshitaka Tsunashima

Akihito Yamamoto

Shigehiko Saida

Hajime Nagano

Ken Ishii

Junichi Shiozawa

Takahito Nakajima

A nonvolatile semiconductor memory device includes a semiconductor portion, a first oxygen-containing portion provided on the semiconductor portion, a silicon-containing portion provided on the first oxygen-containing portion, a first film provided on the silicon-containing portion and including a lamination of a first portion containing silicon and oxygen and a second portion containing silicon and nitrogen, a first high dielectric insulating portion provided on the first film and having an oxide-containing yttrium, hafnium or aluminum, a second oxygen-containing portion provided on the first high dielectric insulating portion, a second high dielectric insulating portion provided on the second oxygen-containing insulating portion and having an oxide-containing yttrium, hafnium or aluminum, a third oxygen-containing portion provided on the second high dielectric insulating portion, and a second film provided on the third oxygen-containing portion.

Nonvolatile semiconductor memory device provided with charge storage layer in memory cell

A nonvolatile semiconductor memory device includes a semiconductor portion, a first oxygen-containing portion located on the semiconductor portion, a silicon-containing portion located on the first oxygen-containing portion, a first film located on the silicon-containing portion and including a lamination of a first portion containing silicon and oxygen and a second portion containing silicon and nitrogen, a first high dielectric insulating portion located on the first film and having an oxide-containing yttrium, hafnium or aluminum, a second oxygen-containing portion located on the first high dielectric insulating portion, a second high dielectric insulating portion located on the second oxygen-containing insulating portion and having an oxide-containing yttrium, hafnium or aluminum, a third oxygen-containing portion located on the second high dielectric insulating portion, and a second film located on the third oxygen-containing portion.

A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a charge storage layer formed on the first insulation layer, a second insulation layer formed on the charge storage layer and including a first high dielectric insulating film which has a higher relative permittivity than a silicon nitride film and a second high dielectric insulating film which has a higher relative permittivity than a silicon nitride film, the first and second high dielectric insulating films being structured so that a silicon oxide film is interposed between them, a control electrode formed on the second insulation layer, a first portion formed between the charge storage layer and the second insulation layer and containing silicon and nitrogen, and a second portion containing silicon and oxygen and located between the charge storage layer and the second insulation layer.

A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a charge storage layer formed on the first insulation layer, a second insulation layer formed on the charge storage layer, and a control electrode formed on the second insulation layer. The second insulation layer includes a first silicon oxide film formed above the charge storage layer, a silicon nitride film formed on the first silicon oxide film, a metal oxide film formed on the silicon nitride film, and a nitride film formed on the metal oxide film. The metal oxide film has a relative permittivity of not less than 7.

A semiconductor device including a semiconductor substrate; a first gate insulating film formed on the semiconductor substrate; a first gate electrode layer formed on the first gate insulating film; an element isolation insulating film formed so as to isolate a plurality of the first gate electrode layers; a second gate insulating film layer formed so as to cover upper surfaces of the plurality of first gate electrode layers and the element isolation insulating films; and a second gate electrode layer formed on the second gate insulating film layer; and the second gate insulating film layer includes a NONON stacked film structure and a nitride film layer contacting the first gate electrode layer and constituting a lowermost layer of the NONON stack film structure is separated at a portion interposing the plurality of neighboring first gate electrode layers.

Semiconductor device and method of manufacturing the same

A semiconductor device including a semiconductor substrate; an element isolation region having a trench filled with an insulating film defined on the semiconductor substrate; a memory cell transistor formed in an element forming region isolated by the element isolating regions of the semiconductor substrate; and the memory cell transistor includes a gate insulating film formed on a surface of the element forming region; a floating gate formed over the gate insulating film; an inter-gate insulating film formed integrally so as to cover the floating gate and the insulating film of the element isolation region and having high dielectric constant in a portion corresponding to the floating gate and low dielectric constant in a portion corresponding to the insulating film of the element isolation region; and a control gate stacked over the floating gate via the inter-gate insulating film.

A method of manufacturing a semiconductor device includes forming a trench in a semiconductor substrate, isotropically forming a trench surface insulating film on an inner surface of the trench, the trench surface insulating film including a deep part functioning as a capacitor insulating film, forming a surface layer side insulating film on the inner surface of the trench so that the surface layer side insulating film is continuously rendered thinner from the surface side of the substrate toward the deep side of the trench, and forming an electrode layer inside the surface layer side insulating film and the trench surface insulating film both formed on the inner surface of the trench.

Semiconductor device with DRAM cell and method of manufacturing the same

A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.

Semiconductor device and its manufacturing method

A manufacturing apparatus which includes a rotary machine, includes: a plurality of accelerometers configured to measure diagnosis time series data attached to the rotary machine at locations where variations of the rotary machine are different; a frequency analysis device configured to perform a frequency analysis on the diagnosis time series data measured by the plurality of accelerometers; a time series data recording module configured to generate diagnosis data based on variations in characteristics of vibration corresponding to an analysis target frequency and to record the diagnosis data; and a life prediction unit configured to analyze the diagnosis data to determine a life span of the rotary machine.

Manufacturing apparatus and method for predicting life of a manufacturing apparatus which uses a rotary machine

A system for predicting life of a rotary machine, includes a vibration gauge configured to measure time series data of a peak acceleration of the rotary machine; a band pass filter configured to filter an analog signal of the time series data of the peak acceleration measured by the vibration gauge in a frequency band including a first analysis frequency expressed as a product of an equation including a number of rotor blades of the rotary machine and a normal frequency unique to the rotary machine; and a data processing unit configured to predict a life span of the rotary machine by characteristics of the filtered analog data of the time series data of the peak acceleration with the first analysis frequency.

System for predicting life of a rotary machine, method for predicting life of a manufacturing apparatus which uses a rotary machine and a manufacturing apparatus

A method for predicting life span of a rotary machine used in a manufacturing apparatus, includes: measuring rotary machine acceleration evaluation time series data with a sampling interval being less than a half the cycle of an analysis target frequency, a number of samplings being at least four times the analysis target frequency; generating evaluation diagnosis data based on variations in characteristics corresponding to the analysis target frequency by subjecting the evaluation time series data to frequency analysis; and determining the life span of the rotary machine using the evaluation diagnosis data.

Method for predicting life span of rotary machine used in manufacturing apparatus and life predicting system

SiGe or SiC films are selectively grown on source/drain regions, followed by selectively growing silicon. A monocrystalline film having a high dislocation density or a polycrystalline film can be grown in growing the silicon film by making the C or Ge concentration higher than a predetermined level. The silicon layer on each of the source/drain regions is not monocrystalline or, even if monocrystalline, has a high density of dislocation. Therefore, the silicon film formed thereon is in the form of a monocrystalline silicon film having a high dislocation density or a polycrystalline silicon film. It is possible to suppress an impurity diffusion to reach a deep region caused by channeling of ions generated in the doping step by means of an ion implantation.

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Mie, Japan

Takeo Furuhata