Kabushiki Kaisha Toshiba

Toshiba Materials Co., Ltd.

Namco Limited

Nippon Oil Corporation

Petroleum Energy Center

Takashi Sano

Hiromasa Kato

Katsuyuki Aoki

Seiichi Suenaga

Maki Yonetsu

Shigeki Matsui

Shinichi Shirahama

Noritaka Nakayama

Osamu Kurosawa

Sachiko Fujisawa

Satoshi Yamaguchi

Kazuo Tagawa

Kayo Nakano

Shinichi Yamamoto

Hiromichi Horie

Masahiro Taguchi

Shozaburo Konishi

Nobuaki Nakashima

Jun Momma

Yoshiko Minami

Masato Takahashi

Hiroshi Endo

Noriaki Yagi

Katsumi Hisano

Koichi Tashiro

Takayuki Fukasawa

Hideo Iwasaki

Tomiya Sasaki

Hitoshi Komatsubara

Naoyuki Sori

Hiromi Shizu

Kazumi Shimotori

Izuru Sugiura

Kenichi Komiya

Hisayuki Wada

Toshiya Sakamoto

Mamoru Ikezawa

Masaaki Itou

Hajime Nakatani

Yoshinori Fujimori

Kentaro Iwai

Kosei Matsuura

Taro Onodera, Deceased

Hideki Shimojima

Kai Fu

According to one embodiment, when a DSC curve is measured using a differential scanning calorimeter (DSC) for a brazing material for bonding a ceramic substrate and a metal plate, the brazing material has an endothermic peak within a range of not less than 550° C. and not more than 700° C. in a heating process. The brazing material favorably includes Ag, Cu, and Ti. The brazing material favorably has not less than two of the endothermic peaks within a range of not less than 550° C. and not more than 650° C. in the heating process.

Brazing material, bonded body, ceramic circuit board, and method for manufacturing bonded body

In a silicon nitride sintered body including silicon nitride crystal grains and a grain boundary phase, dislocation defect portions exists inside at least some of the silicon nitride crystal grains. A percentage of a number of the at least some of the silicon nitride crystal grains among any 50 of the silicon nitride crystal grains having completely visible contours in any cross section or surface of the silicon nitride sintered body is not less than 50% and not more than 100%. It is favorable that a plate thickness of the silicon nitride substrate, in which the silicon nitride sintered body is used, is within the range not less than 0.1 mm and not more than 0.4 mm. The TCT characteristics can be improved by using the silicon nitride substrate in the silicon nitride circuit board.

Silicon nitride sintered body, silicon nitride substrate, and silicon nitride circuit board

A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a first copper part. The first copper part is bonded at a first surface of the ceramic substrate via a first brazing material part. The thickness of the first copper part is 0.6 mm or more. The side surface of the first copper part includes a first sloped portion. The width of the first sloped portion is not more than 0.5 times the thickness of the first copper part. The first brazing material part includes a first jutting portion jutting from the end portion of the first sloped portion. The length of the first jutting portion is not less than 0 μm and not more than 200 μm. The contact angle between the first jutting portion and the first sloped portion is 65° or less.

Method for manufacturing a ceramic copper circuit board

A bonded body includes a ceramic substrate and a copper plate, in which the copper plate is bonded to the ceramic substrate via a bonding layer, the copper plate includes a surface perpendicular to a direction in which the ceramic substrate and the copper plate are bonded, and a number percentage of copper crystal grains having major diameters greater than 400 μm in three 5 mm×5 mm regions included in the surface is not less than 0% and not more than 5%. The bonding temperature is favorably not more than 800° C. The number percentage of the copper crystal grains having major diameters greater than 400 μm is favorably not more than 1%.

Bonded body, ceramic copper circuit board, method for manufacturing bonded body, and method for manufacturing ceramic copper circuit board

A bonded body according to an embodiment includes a ceramic substrate, a copper plate, and a bonding layer that is located on at least one surface of the ceramic substrate and bonds the ceramic substrate and the copper plate. The bonding layer includes titanium. The bonding layer includes first and second regions; the first region includes a layer including titanium as a major component; the layer is formed at an interface of the bonding layer with the ceramic substrate; and the second region is positioned between the first region and the copper plate. The bonded body has a ratio M1/M2 of a titanium concentration M1 at % in the first region and a titanium concentration M2 at % in the second region that is not less than 0.1 and not more than 5 when the Ti concentrations are measured by EDX respectively in measurement regions in the first and second regions.

Bonded body, ceramic copper circuit substrate, and semiconductor device

A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a first copper part. The first copper part is bonded at a first surface of the ceramic substrate via a first brazing material part. The thickness of the first copper part is 0.6 mm or more. The side surface of the first copper part includes a first sloped portion. The width of the first sloped portion is not more than 0.5 times the thickness of the first copper part. The first brazing material part includes a first jutting portion jutting from the end portion of the first sloped portion. The length of the first jutting portion is not less than 0 &#x3bc;m and not more than 200 &#x3bc;m. The contact angle between the first jutting portion and the first sloped portion is 65&#xb0; or less.

Ceramic copper circuit board and method for manufacturing the same

According to one embodiment, a ceramic copper circuit board a ceramic substrate, a copper circuit board provided at one surface of the ceramic substrate. A ratio of a thickness of the copper circuit board to a thickness of the ceramic substrate is 1.25 or more. A number of grain boundaries is not less than 5 and not more than 250 along every 10-mm straight line drawn in a front surface of the copper circuit board.

Ceramic copper circuit board and semiconductor device based on the same

A circuit board includes: a ceramic substrate that has a first surface and a second surface; a first metal part that has a first metal plate joined to the first surface and a protrusion projecting from a front surface of the first metal plate; and a second metal part that has a second metal plate joined to the second surface. When the ceramic substrate is equally divided into first to third sections along a longer side direction, V, V, V, V, V, and Vare numbers satisfying formula V/V+V/V&#x2264;2(V/V), 0.5&#x2264;V/V&#x2264;2, 0.5&#x2264;V/V&#x2264;2, and 0.5&#x2264;V/V&#x2264;2.

Circuit board and semiconductor module

According to an embodiment, two or more sets of knead forging are performed where one set is cold forging processes in directions parallel to and perpendicular to a thickness direction of a columnar titanium material. The titanium material is heated to a temperature of 700&#xb0; C. or more to induce recrystallization, and thereafter, two or more sets of knead forging are performed where one set is the cold forging processes in the directions parallel to and perpendicular to the thickness direction. Further, the titanium material is cold rolled, and is heat-treated to a temperature of 300&#xb0; C. or more.

Sputtering target, manufacturing method thereof, and manufacturing method of semiconductor element

A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m&#xb7;K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.

Silicon nitride substrate and silicon nitride circuit board using the same

According to one embodiment, a tungsten alloy includes a W component and a Hf component including HfC. A content of the Hf component in terms of HfC is 0.1 wt % or more and 3 wt % or less.

Tungsten alloy, tungsten alloy part, discharge lamp, transmitting tube, and magnetron

A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m&#xb7;K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/rum or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.

A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m&#xb7;K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (TT) of a total length Tof the grain boundary phase in a thickness direction with respect to a thickness Tof the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.

Growing community of inventors

Fujisawa, Japan

Takashi Sano