Canon Kabushiki Kaisha

Solexel, Inc.

Other

Leland Stanford Junior University

Trutag Technologies, Inc.

Ob Realty, LLC

Applied Materials, Inc.

Dainippon Screen Mfg. Co., Ltd.

Cannon Kabushiki Kaisha

Wasa, Kiyotaka

Takao Yonehara

Kiyofumi Sakaguchi

Kenji Yamagata

Nobuhiko Sato

Shoji Nishida

Kazutaka Yanagita

Mehrdad M Moslehi

Kazuaki Ohmi

Karl-Josef Kramer

Subramanian Tamilmani

Katsumi Nakagawa

Jay Ashjaee

Kazuaki Omi

George D Kamian

Masaaki Iwane

Hiroyuki Tokunaga

Yoshinobu Sekiguchi

Takeshi Ichikawa

Yukiko Iwasaki

Mitsuro Sugita

Toru Takisawa

Tetsuro Fukui

Takanori Matsuda

Yasuyoshi Takai

Hideya Kumomi

Somnath S Nag

Tetsuya Shimada

Akira Unno

Kiyotaka Wasa

Yasuyoshi Miyaji

Noriyuki Hayashi

Masaharu Ozaki

Takamitsu Inahara

Tetsuya Kaneko

Takeo Tsukamoto

Mamoru Miyawaki

Toshihiko Takeda

Takanori Watanabe

Masahiko Okunuki

Isamu Shimoda

Akira Suzuki

Masaru Sakamoto

Noritaka Ukiyo

Krishna Chandra Saraswat

Chi On Chui

Yasuhiro Naruse

Shiro Arikawa

Makoto Koto

Ammar Munir Nayfeh

Kojiro Nishi

Toru Koizumi

Shigetoshi Sugawa

Mahito Shinohara

Tohru Den

Shunsuke Inoue

Akira Ishizaki

Kazuhiko Fukutani

Hirokatsu Miyata

Norihiko Utsunomiya

Sean M Seutter

Pawan Kapur

David Xuan-Qi Wang

Kenji Nakagawa

Tetsuya Takeuchi

Tetsunobu Kohchi

Yuji Nishigaki

Masataka Ito

Kunio Watanabe

Junichi Hoshi

Satoru Nishiuma

Nobuo Kawase

Tadashi Atoji

Hirokazu Kurisu

Hiroshi Matsuda

Akira Okita

Toshihiko Ouchi

Yoshiyuki Osada

Akiharu Takabayashi

Etsuro Kishi

Tsutomu Ikeda

Toshihiko Tsuji

Virendra V Rana

Shigeki Kondo

Yoshio Nakamura

Yohei Ishida

Masahiro Okuda

Yasutomo Fujiyama

Karl J Armstrong

David Mordo

Shinji Tsutsui

Kazuo Kokumai

Jun Nakayama

Kazutaka Momoi

Yasuo Kakizaki

Fatih Mert Ozkeskin

Takaaki Terashi

Virenda V Rana

Tamotsu Satoh

Tohru Kohda

This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

Apparatus and methods for uniformly forming porous semiconductor on a substrate

This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

High-throughput batch porous silicon manufacturing equipment design and processing methods

Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

Systems and methods for laser splitting and device layer transfer

High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.

High productivity deposition reactor comprising a gas flow chamber having a tapered gas flow space

This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.

High-productivity porous semiconductor manufacturing equipment

Method and apparatus for forming free-standing, substantially monocrystalline semiconductor substrates is described. A template substrate is subjected to a process of forming a porous layer on each major surface of the template substrate. The porous layer is smoothed, and then an epitaxial layer is formed on each porous layer. Mechanical energy is used to separate the epitaxial layers from the template substrate, which is recycled by removing any remaining porous and epitaxial material.

Methods and apparatus for forming semiconductor

An apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates in a batch electrochemical anodic etch process is provided. The apparatus comprises a plurality of edge-sealing template mounts operable to prevent formation of porous silicon at the edges of a plurality of templates. An electrolyte is disposed among the plurality of templates. The apparatus further comprises a power supply operable to switch polarity, change current intensity, and control etching time to produce the porous silicon layers.

Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates

High-Throughput batch porous silicon manufacturing equipment design and processing methods

An apparatus for anodizing substrates immersed in an electrolyte solution. A substrate holder mounted in a storage tank includes a first support unit having first support elements for supporting, in a liquid-tight condition, only lower circumferential portions of the substrates, and a second support unit attachable to and detachable from the first support unit and having second support elements for supporting, in a liquid-tight condition, remaining circumferential portions of the substrates. A drive mechanism separates the first support unit and the second support unit when loading and unloading the substrates, and for connecting the first support unit and the second support unit after the substrates are placed in the substrate holder.

Anodizing apparatus

A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor.

Method of manufacturing semiconductor chip

Growing community of inventors

Kawasaki, Japan

Takao Yonehara