Renesas Electronics Corporation

Takaaki Tsunomura

Toshiaki Iwamatsu

Yoshiki Yamamoto

Hideki Makiyama

Hidekazu Oda

Masaaki Shinohara

Tomohiro Yamashita

Takashi Kuroi

Katsuyuki Horita

Masato Ishibashi

Occurrence of short-channel characteristics and parasitic capacitance of a MOSFET on a SOI substrate is prevented. A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the SOI substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of the semiconductor substrate with using the gate electrode and the epitaxial layer as a mask, so that a halo region is formed in only a region of the upper surface of the semiconductor substrate which is right below a vicinity of both ends of the gate electrode.

Semiconductor device

On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain regions of a MOSFET formed in the SOI region, and no epitaxial layer is formed in source and drain regions of a MOSFET formed in the bulk silicon region. By covering the end portions of the epitaxial layers with silicon nitride films, even when diffusion layers are formed by implanting ions from above the epitaxial layers, it is possible to prevent the impurity ions from being implanted down to a lower surface of a silicon layer.

Method of manufacturing semiconductor device

Manufacturing method of semiconductor device including field-effect transistor comprising buried oxide (BOX) film and silicon layer

Semiconductor device and manufacturing method of the same

A semiconductor device having an n channel MISFET formed on an SOI substrate including a support substrate, an insulating layer formed on the support substrate and a silicon layer formed on the insulating layer has the following structure. An impurity region for threshold adjustment is provided in the support substrate of a gate electrode so that the silicon layer contains carbon. The threshold value can be adjusted by the semiconductor region for threshold adjustment in this manner. Further, by providing the silicon layer containing carbon, even when the impurity of the semiconductor region for threshold adjustment is diffused to the silicon layer across the insulating layer, the impurity is inactivated by the carbon implanted into the silicon layer. As a result, the fluctuation of the transistor characteristics, for example, the fluctuation of the threshold voltage of the MISFET can be reduced.

Semiconductor device with silicon layer containing carbon

Method of manufacturing a MISFET on an SOI substrate

Method of manufacturing a MOSFET on an SOI substrate

Method of manufacturing a semiconductor device to prevent occurrence of short-channel characteristics and parasitic capacitance

Manufacturing method of semiconductor device with silicon layer containing carbon

Growing community of inventors

Tokyo, Japan

Takaaki Tsunomura