Promos Technologies, Inc

Mosel Vitelic Corporation

Promos Technology, Inc.

Tai-Peng Lee

Chuck Jang

Barbara Haselden

Ching-Yueh Hu

Zhong Dong

A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask.

Use of TEOS oxides in integrated circuit fabrication processes

Chlorine is incorporated into pad oxide () formed on a silicon substrate () before the etch of substrate isolation trenches (). The chlorine enhances the rounding of the top corners (C) of the trenches when a silicon oxide liner () is thermally grown on the trench surfaces. A second silicon oxide liner () incorporating chlorine is deposited by CVD over the first liner (), and then a third liner () is thermally grown. The chlorine concentration in the second liner () and the thickness of the three liners () are controlled to improve the corner rounding without consuming too much of the active areas ().

Use of chlorine to fabricate trench dielectric in integrated circuits

A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.

Control of air gap position in a dielectric layer

A high density plasma chemical vapor deposition (HDP-CVD) process is used to deposit silicon dioxide in trenches of various widths. The thickness of the silicon dioxide filling both narrow and wide trenches is made more uniform by reducing an HDP-CVD etch to deposition ratio. The lowered etch to deposition ratio is achieved by lowering a ratio of oxygen to silane gas, by lowering the power of a high frequency bias signal, and by lowering the total gas flow rate.

Reduced thickness variation in a material layer deposited in narrow and wide integrated circuit trenches

An OXO-type inter-poly insulator (where X is a high-K metal oxide and O is an insulative oxide) is defined by forming an amorphous metal oxide layer on a silicon-based insulator (e.g., a silicon oxide layer) and then nitridating at least upper and lower sub-layers of the amorphous metal oxide with a low temperature plasma treatment that maintains temperature below the recrystallization temperature of the amorphous material. Such a plasma treatment has been found to improve breakdown voltage characteristics of the insulator. In one embodiment, the metal oxide includes aluminum oxide and it is fluorinated with low temperature plasma prior to nitridation.

Low temperature nitridation of amorphous high-K metal-oxide in inter-gates insulator stack

A method for producing an ultraviolet light (UV) transmissive silicon nitride layer in a plasma enhanced chemical vapor deposition (PECVD) reactor is presented. The UV transmissive film is produced by reducing, in comparison to a standard silicon nitride process, a flow rate of the silane and ammonia gas precursors to the PECVD reactor, and significantly increasing a flow rate of nitrogen gas to the reactor. The process reduces the concentration of Si&#x2014;H bonds in the silicon nitride film to provide UV transmissivity. Further, the amount of nitrogen in the film is greater than in a standard PECVD silicon nitride film, and as a percentage constitutes a greater part of the film than silicon. The film has excellent step coverage and a low number of pinhole defects. The film may be used as a passivation layer in a UV erasable memory integrated circuit.

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Milpitas, CA, United States of America

Tai-Peng Lee