Fujitsu Corporation

Tadashi Asai

Toyoji Sawada

Yoshikazu Arisaka

Morihiko Hamada

Katsumi Shigenobu

Shigekazu Aoki

Kenji Togashi

Yukio Saka

A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.

Self-testing circuit in semiconductor memory device

Growing community of inventors

Kasugai, Japan

Tadashi Asai