Shinko Electric Industries Co., Ltd.

Tadashi Arai

Takaharu Yamano

Toshio Kobayashi

Tsuyoshi Kobayashi

Hajime Iizuka

Hideaki Sakaguchi

Kazutaka Kobayashi

Yuji Kunimoto

Koichi Tanaka

Kiyoaki Iida

Tetsuya Koyama

Tomoaki Mashima

Takashi Yanagisawa

Yasuyuki Kimura

Tadashi Kodaira

Yoshikazu Hirabayashi

Hidetoshi Arai

Yoshihiro Machida

Takashi Kurihara

Yukiharu Takeuchi

Nobuyuki Kurashima

Hiroshi Shimizu

Syota Miki

Toshiyuki Okabe

A wiring substrate includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a first adhesive layer and conductive paste. The first adhesive layer is on a surface of a first insulating layer. The conductive paste is in an opening in the first adhesive layer. The second substrate includes a second adhesive layer and a protruding electrode. The second adhesive layer is on a surface of a second insulating layer facing toward the first substrate, and is bonded to the first adhesive layer. The protruding electrode has an end uncovered by the second adhesive layer, and is electrically connected to the conductive paste.

Wiring substrate

An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.

Electronic part embedded substrate and method of producing an electronic part embedded substrate

A semiconductor device includes a wiring substrate, a semiconductor chip, conductive paste, and an adhesive layer. The wiring substrate includes an insulating layer and a wiring layer on a surface of the insulating layer. The semiconductor chip includes a circuit-formation surface in which an electrode pad is provided, and is mounted on the wiring substrate with the circuit-formation surface facing toward the wiring layer. The conductive paste electrically connects the wiring layer and the electrode pad. The adhesive layer is over the entirety of the surface of the insulating layer, and covers the wiring layer and the conductive paste. The adhesive layer fills in a gap between the surface of the insulating layer and the circuit-formation surface, to bond the wiring substrate and the semiconductor chip. The adhesive layer extends onto a side surface of the semiconductor chip to form a fillet.

Semiconductor device

A semiconductor device includes a wiring substrate, a lower magnetic shield member, a semiconductor chip, and an upper magnetic shield member. The lower magnetic shield member is provided on the wiring substrate. The semiconductor chip is provided on the lower magnetic shield member. The semiconductor chip includes a magnetic memory element. The upper magnetic shield member is provided on the semiconductor chip. The semiconductor chip is disposed between the upper magnetic shield member and the lower magnetic shield member. The lower magnetic shield member and the upper magnetic shield member include a soft magnetic resin. The lower magnetic shield member and the upper magnetic shield member are in direct contact with each other.

Semiconductor device having multiple magnetic shield members

A semiconductor device includes a wiring substrate, a lower magnetic shield member, a semiconductor chip, and an upper magnetic shield member. The lower magnetic shield member is provided on the wiring substrate. The semiconductor chip is provided on the lower magnetic shield member. The semiconductor chip includes a magnetic memory element. The upper magnetic shield member is provided over the semiconductor chip. The semiconductor chip is disposed between the upper magnetic shield member and the lower magnetic shield member. The lower magnetic shield member and the upper magnetic shield member are in direct contact with each other.

Chip embedded substrate and method of producing the same

A wiring substrate includes a substrate, a first insulating layer formed on the substrate, wiring patterns formed on a first surface of the first insulating layer, and a second insulating layer formed on the first surface of the first insulating layer. The second insulating layer covers the wiring patterns and includes a first opening that partially exposes adjacent wiring patterns as a pad. A projection is formed in an outer portion of the substrate located outward from where the first opening is arranged. The projection rises in a thickness direction of the substrate.

Wiring substrate, light emitting device, and method for manufacturing wiring substrate

A method of manufacturing a light-emitting element mounting package including laminating a metallic layer on an insulating layer; forming a light-emitting element mounting area which includes a pair of electroplating films formed by electroplating using the metallic layer as a power supply layer on the metallic layer; forming a light-emitting element mounting portion in which a plurality of wiring portions are separated by predetermined gaps, by removing predetermined portions of the metallic layer, wherein, in the forming the light-emitting element mounting portion, the metallic layer is removed so that one of the pair of electroplating films belongs to one wiring portion of the plurality of wiring portions and another of the pair of electroplating films belongs to another wiring portion adjacent to the one wiring portion.

Light-emitting element mounting package, light-emitting element package, and method of manufacturing the same

A package includes: a leadframe made of conductive material and on which the plurality of electronic components are to be mounted, the leadframe including a first surface and a second surface opposite to the first surface and including a plurality of elongate portions arranged in parallel to each other with a gap interposed between the adjacent elongate portions; a heat sink including a first surface and a second surface opposite to the first surface, wherein the leadframe is disposed above the heat sink such that the second surface of the leadframe faces the first surface of the heat sink; and a resin portion, wherein the leadframe and the heat sink are embedded in the resin portion such that the first surface of the leadframe and the second surface of the heat sink are exposed from the resin portion, respectively.

Package for mounting electronic components, electronic apparatus, and method for manufacturing the package

A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.

A substrate includes a first lead frame, a second lead frame, and a resin layer. The first lead frame includes a heat sink and a plurality of electrodes for external connection. The second lead frame is laminated on the first lead frame and includes a plurality of wirings for mounting light emitting elements. The resin layer is filled between the first lead frame and the second lead frame. The plurality of wirings are arranged above the heat sink. The plurality of electrodes and part of the plurality of wirings are joined with each other.

Substrate, light emitting device and method for manufacturing substrate

A wiring substrate includes a ceramic substrate including plural ceramic layers, an inner wiring, and an electrode electrically connected to the inner wiring, the electrode exposed on a first surface of the ceramic substrate, and a silicon substrate body having a front surface and a back surface situated on an opposite side of the front surface and including a wiring pattern formed on the front surface and a via filling material having one end electrically connected to the wiring pattern and another end exposed at the back surface. The back surface is bonded to the first surface of the ceramic substrate via a polymer layer. The via filling material penetrates through the polymer layer and is directly bonded to the electrode.

Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate

A wiring board includes a ceramic substrate including a plurality of stacked ceramic layers, an internal wiring, and an electrode, the internal wiring being electrically connected to the electrode, the electrode being exposed from a first surface of the ceramic substrate; and a silicon substrate including a wiring layer, the wiring layer including a wiring pattern and a via-fill, the wiring pattern being formed on a main surface of the silicon substrate, an end of the via-fill being electrically connected to the wiring pattern, another end of the via-fill being exposed from a rear surface of the silicon substrate positioned opposite to the main surface, wherein the rear surface of the silicon substrate is anodically bonded to the first surface of the ceramic substrate; and the via-fill of the silicon substrate is directly connected to the electrode of the ceramic substrate.

Wiring board, manufacturing method of the wiring board, and semiconductor package

A semiconductor element includes connection terminals. The connection terminals are each shaped in such a manner that the transverse cross-sectional area in a portion near the leading end thereof decreases toward the leading end. Specifically, the shape of each of the connection terminals is columnar except for the portion near the leading end, and the side surface in the portion near the leading end of the connection terminal is shaped in a tapered form. Furthermore, a metal layer for improving a solder wettability may be formed at least on the side surface shaped in the tapered form, of the connection terminal.

Growing community of inventors

Nagano, Japan

Tadashi Arai