Taiwan Semiconductor Manufacturing Comp. Ltd.

Ta-Wei Ou

Shih-Ming Chang

Chien-Chih Chen

Chun-Hung Liu

Chien-Cheng Chen

Chia-Hua Chang

Wen Lo

Hsin-Wei Wu

An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.

Dummy insertion for improving throughput of electron beam lithography

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Taichung, Taiwan

Ta-Wei Ou