Infineon Technologies Ag

Disco Hi-tec Europe Gmbh

Sylvia Baumann Winter

Barbara Vasquez

David Wallis

Karl Heinz Priewasser

A semiconductor device includes a chip, a first kerf adjacent the chip and having a first main direction, a second kerf adjacent the chip and having a second main direction. A kerf junction is formed by the first kerf and the second kerf. A crack stop barrier is located along a first portion of a perimeter of the kerf junction.

Crack stop barrier and method of manufacturing thereof

A wafer is disclosed. The wafer comprises a plurality of chips and a plurality of kerfs. A kerf of the plurality of kerfs separates one chip from another chip. The kerf comprises a crack stop barrier.

Disclosed is a method for generating chip stacks during the production of chips from wafers, the chips located on the wafer being separated from one another, the wafer being ground thin and the chips being stacked to form chip stacks, the chips being checked for the purpose of a functional check, characterized in that the chips are checked in a first work step, that adhesive material is applied on the good chips, whereas the bad chips are not provided with adhesive material, that the wafer is assembled and ground thin afterwards and that the bad chips are subsequently removed and replaced by good chips.

Method for generating chip stacks

The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.

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Laussnitz, Germany

Sylvia Baumann Winter