Lam Research Corporation

Susan Ellingboe

Janet M Flanner

Ian J Morey

John Lang

Christine M Janowiak

Techniques for etching through a low capacitance dielectric layer in a plasma processing chamber are disclosed. The techniques uses an etch chemistry that includes N , O , and a hydrocarbon. By etching the low capacitance dielectric layer with a plasma created out of the etch chemistry, fast etch rates can be obtained while also maintaining profile control and preserving critical dimension of the resultant opening (e.g., via/trench) being etched in the low capacitance layer.

Technique for etching a low capacitance dielectric layer

Convertible hot edge ring to improve low-K dielectric etch

Two-step process to improve low-K dielectric etch uniformity, apparatus to perform the method, and semiconductor devices formed in accordance with the method. In a first etching step, an insulating hot edge ring is provided. When the photoresist clearing signal is observed using end-point software, the insulating cover is moved aside to expose the conductive edge ring for the remainder of the etch. One aspect of this invention contemplates an insulator cover over a conductive edge ring at the start of wafer etching, which cover is removed after end-pint detection. The present invention contemplates a number of physical configurations whereby the insulator ring is urged into, and away from, its masking of the conductive edge ring. Alternatively, the etching of a wafer bearing low-K material may be conducted using two edge rings, where the first etch step is conducted using an insulating hot edge ring, and a second etch step is conducted using a conductive hot edge ring. According to this aspect, the two step process may thus be performed in a plurality of reactor vessels, or in one reactor vessel having a plurality of processing stations. Different low-K materials may require differing etchant/passivant/diluent combinations. Accordingly, the two-step etch process is taught in conjunction with any number of different etch chemistries.

A method for etching through a low capacitance dielectric layer in a plasma processing chamber. The low capacitance dielectric layer is disposed below a hard mask layer on a substrate. The method includes flowing an etch chemistry that includes N.sub.2 and H.sub.2 into the plasma processing chamber. There is included creating a plasma out of the etch chemistry. The method also includes etching, using the plasma, through the low capacitance dielectric layer through openings in the hard mask layer in the plasma processing chamber.

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Fremont, CA, United States of America

Susan Ellingboe