Sandisk Technologies Inc.

Sandisk Corporation

Micron Technology Incorporated

Sandisk Information Technology (Shanghai) Co., Ltd.

Sandisk Semiconductor (Shanghai) Co. Ltd.

Suresh Kumar Upadhyayula

Hem P Takiar

Robert C Miller

Ning Ye

Steven Theodore Sprouse

Ka Ian Yung

Hong Wan Ng

Bonnie Ming-Yan Chan

Shih-Ping Fan-chiang

Deepanshu Dutta

Kevin M Conley

Chin Hui Chong

Joel Bernard Jacobs

Li Ping Wang

Chin-Tien Chiu

Chih-Chin Liao

Robert Andrew Howard

Sarath Chandran Puthenthermadam

Jeff Salazar

Wesley G Brewer

Cheeman Yu

Navneeth Kankani

Zhong Lu

Thiam Chye Lim

Anthony King

Weili Wang

Daniel Francis Kennedy

Chin Tien Chiu

Patricio Collantes

Michael Alan Morganstern

Kim Lee Bock

Peng Chen

Matt Peterson

Naveen Kini

Ming Hsun Lee

Yeow Chon Ong

King Hoo Ong

Sanjay Dave

Peng Fu

Yuang Zhang

Enyong Tai

Chih Chin Liao

Sung Tan Shih

Pradeep Kumar Rai

An assembly comprising a substrate with a first and second bond pad at a top surface; and a semiconductor die with a lower surface coupled to the top surface, an upper surface with a third and fourth bond pad thereat, and a side surface perpendicular to the upper and lower surfaces. The first bond pad can be a first distance, the second bond pad can be a second distance, the third bond pad can be a third distance, and the fourth bond pad can be a fourth distance, respectively, from the side surface. The first and third distances summed can be the same as the second and fourth distances summed. A first wire can extend between the first and third bond pads, and a second wire can extend between the second and fourth bond pads.

Semiconductor device assemblies with balanced wires, and associated methods

The subject application relates to reinforced semiconductor device packaging and associated systems and methods. The device generally includes a substrate and one or more integrated circuit dies electrically coupled to the substrate with wire bonds. The device includes an encapsulant enclosing the one or more dies and the wire bonds. The package can include a reinforcing layer positioned on one or more surfaces of the encapsulant, a reinforcing wire extending through the encapsulant, or entrained reinforcing fiber portions positioned throughout the encapsulant. The reinforcing layer can be textile woven from synthetic or natural fibers, such as aramid, carbon, or glass. The package can be formed by disposing a reinforcing textile layer in a mold, placing a die and substrate in the mold with a liquid encapsulant, and hardening the liquid encapsulant to adhere the reinforcing textile layer, the encapsulant, the die, and the substrate together.

Reinforced semiconductor device packaging and associated systems and methods

A method of manufacturing a microelectronic device may include forming a wiring layer on a first surface of a wafer. The method may also include forming a modified layer along separation regions for each microelectronic device of the wafer by focusing a laser on an inside portion of the wafer. The method may also include removing material from the second surface of the wafer. The wafer may be cooled to a temperature where a low dielectric constant layer extending across the separation regions is brittle while the material is removed from the second surface of the wafer. The method may further include separating the wafer along the separation region to form separate microelectronic devices.

Method of manufacturing microelectronic devices, related tools and apparatus

A semiconductor device vertically mounted on a medium such as a printed circuit board, and a method of its manufacture, are disclosed. The semiconductor device includes a stack of semiconductor die having contact pads which extend to an active edge of the die aligned on one side of the stack. The active edges of the die are affixed to the PCB and the contact pads at the active edge are electrically coupled to the PCB. This configuration provides an optimal, high density arrangement of semiconductor die in the device, where a large number of semiconductor die can be mounted and electrically coupled directly to the PCT, without a substrate, without staggering the semiconductor die, and without using wire bonds.

Vertical semiconductor device having a stacked die block

A semiconductor device, and a method of its manufacture, are disclosed. The semiconductor device includes a substrate having a solder mask. A plurality of pillar bases are formed on the solder mask, and a plurality of solder pillars are applied to the pillar bases. The plurality of solder pillars support one or more semiconductor die above the substrate and the number of solder pillars prevent stresses in the one or more semiconductor die which could otherwise damage the semiconductor die.

Semiconductor device including support pillars on solder mask

A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.

Semiconductor device including independent film layer for embedding and/or spacing semiconductor die

Apparatuses, systems, methods, and computer program products are disclosed for preventing overheating, for annealing non-volatile memory. An apparatus may include an array of non-volatile storage elements. A heating element may be configured to heat a first set of the non-volatile storage elements to anneal the first set of non-volatile storage elements. A heat shield or cooling element may be configured to prevent a second set of the non-volatile storage elements from overheating during annealing of the first set of non-volatile storage elements, to mitigate data errors for data stored on the second set of non-volatile storage elements.

Overheat prevention for annealing non-volatile memory

A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.

Low profile wire bonded USB device

In a particular embodiment, a connector includes a connector module and a set of conductive connectors coupled to the connector module. The set of conductive connectors is configured to electrically couple to a set of contacts of a memory module. The connector also includes a ground contact coupled to the connector module. The ground contact is configured to be coupled to a ground of the memory module and to a conductive shroud.

Connector of a universal serial bus device

Semiconductor package including flip chip controller at bottom of die stack

A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Etched surface mount islands in a leadframe package

A system of micro balls is disclosed for coupling an electronic component to a printed circuit board. The micro balls have a small diameter, and each contact pad may include an array of two or more micro balls. An example of a micro ball may include a polymer core, surrounded by a copper layer, which is in turn surrounded by a layer of solder.

Electronic component including micro balls

A semiconductor device is disclosed including an electromagnetic radiation shield. The device may include a substrate having a shield ring defined in a conductance pattern on a surface of the substrate. One or more semiconductor die may be affixed and electrically coupled to the substrate. The one or more semiconductor die may then be encapsulated in molding compound. Thereafter, a metal may be plated around the molding compound and onto the shield ring to form an EMI/RFI shield for the device.

Radiation-shielded semiconductor device

A semiconductor package is disclosed including a leadframe, memory die and controller die, one or more of which are customized to facilitate electrical connection of the memory and controller die bond pads to the contact pads of the host device via the leadframe. By customizing one or more of the leadframe, memory die and controller die, an interposer layer normally required to connect the die in the semiconductor package with a host device may be omitted.

Col-based semiconductor package including electrical connections through a single layer leadframe

Growing community of inventors

San Jose, CA, United States of America

Suresh Kumar Upadhyayula