Samsung Electro-mechanics Co., Ltd.

Sung Yi

Young Do Kweon

Joon Seok Kang

Young-Do Kweon

Woon-Chun Kim

Hwa-sun Park

Hong-Won Kim

Joon-Seok Kang

Tae Sung Jeong

Seung Seoup Lee

Yul-Kyo Chung

Hong Won Kim

Dae-Jun Kim

Jin-Seon Park

Jong-Hwan Baek

Young Ho Kim

Jung Won Lee

Jin Gu Kim

Hyung Jin Jeon

Jin Seon Park

Jong Yun Lee

Do-Jae Yoo

Seog-Moon Choi

Soon-Gyu Yim

Sang-Chul Lee

Jong Hwan Baek

Seung-Wook Park

Hyung-Jin Jeon

Jin-Gu Kim

Jae-Cheon Doh

Jong-Yun Lee

Sun-Kyong Kim

Jong-Woon Kim

A method of manufacturing a capacitor-embedded printed circuit board using a first conductive layer formed on one side of an insulation layer, the method including: forming a second conductive layer on one side of the first conductive layer; forming a second electrode by removing a portion of the second conductive layer; forming a first electrode by removing a portion of the first conductive layer in correspondence with the second electrode; and forming a dielectric layer on one side of the second electrode.

Method of manufacturing a capacitor-embedded printed circuit board

The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.

Method of manufacturing a chip embedded printed circuit board

An electronic component package and a manufacturing method thereof are disclosed. The electronic component package manufacturing method, which includes mounting an electronic component in one surface of a first insulation layer; bonding a heat sink to the one surface of the first insulation layer, corresponding to the electronic component, to cover the electronic component, the heat sink being formed with a cavity; charging the cavity with an adhesive; and forming a circuit pattern in the other surface of the first insulation layer, can prevent a void from being generated in the adhesive, make the handling stable and make the size small by allowing the heat sink formed with the cavity to cover the electronic component before the pattern build-up and supplying the adhesive through one side of the cavity while providing negative pressure through the other side.

Electronic component package and manufacturing method thereof

Disclosed herein is an electronic component-embedded printed circuit board including: a base plate including an insulating resin layer and circuit layers; and an electronic component embedded in the insulating resin layer, wherein the insulating resin layer has a thickness 1.3&#x2dc;3 times greater than that of the electronic component. The electronic component-embedded printed circuit board has an optimum thickness ratio of its constituents in order to minimize the warpage thereof at the time of manufacturing the same.

Electronic component-embedded printed circuit board

The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

A method of manufacturing a capacitor-embedded printed circuit board that includes fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

Method of manufacturing capacitor-embedded PCB

A method for manufacturing a wafer level package including: forming a redistribution line connected to a top surface of a die pad on a wafer with the die pad; additionally preparing a carrier film including a metal post with a concave central portion on one surface; bonding the metal post to a top surface of the redistribution line; molding a space between the metal posts with a molding resin; and removing the carrier film.

Method of manufacturing wafer level package

Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.

Wafer Level package for heat dissipation and method of manufacturing the same

A wafer level package includes a chip, a removable resin layer, a molding material, a dielectric layer, redistribution lines and a solder resist. The removable resin layer is formed to surround side surfaces and a lower surface of the chip. The molding material is formed on the lower surface of the removable resin layer. The dielectric layer is formed over the removable resin layer including the chip and having via holes to expose portions of the chip. The redistribution lines are formed on the dielectric layer including insides of the via holes to be connected to the chip. The solder resist layer is formed on the dielectric layer to expose portions of the redistribution lines.

Wafer level package with removable chip protecting layer

A semiconductor chip package and a printed circuit board having an embedded semiconductor chip package are disclosed. The semiconductor chip package may include a semiconductor chip that has at least one chip pad formed on one side, and a capacitor formed on the other side of the semiconductor chip.

Semiconductor chip package and printed circuit board

Disclosed herein are a die package and a method of manufacturing the die package. A solder layer is formed on a lower surface of a die. The die is self-aligned and attached to a support plate using surface tension between the solder layer and a metal layer of the support plate, thus reducing attachment lead time of the die.

Die package and method of manufacturing the same

A printed circuit board and a manufacturing method thereof are disclosed. The method in accordance with an embodiment of the present invention includes: providing a substrate on which a first insulation layer, a first circuit pattern, a second insulation layer and a resin layer are successively laminated; boring a through-hole penetrating the substrate; forming roughness on the resin layer by a desmear process; forming a via making an electrical connection between layers through the through-hole; and forming a second circuit pattern on the resin layer having roughness formed thereon.

PCB and manufacturing method thereof

Disclosed herein is a wafer level packaging image sensor module, including a wafer including an image sensor, a circuit portion and a lower electrode on one side thereof, a lens actuator disposed on the lower electrode and made of electroactive polymer, an upper electrode disposed on the lens actuator, and a lens unit disposed on the upper electrode to allow light to be transmitted to the image sensor therethrough. The wafer level packaging image sensor module includes the lens actuator made of electroactive polymer, and thus it enables realization of the autofocusing of the wafer level packaging image sensor module.

Wafer level packaging image sensor module having lens actuator and method of manufacturing the same

A method of manufacturing a capacitor-embedded PCB is disclosed. The method may include fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

A method of manufacturing a component-embedded printed circuit board is disclosed. The method includes: forming a blind hole in the first metal layer such that the first insulation layer is exposed, for a metal-clad laminate that includes a first metal layer stacked over a first insulation layer, securing a component to the first insulation layer by embedding the component in the blind hole, stacking a second insulation layer and a second metal layer on either side of the metal-clad laminate, and forming circuit patterns by removing portions of the metal layers.

Growing community of inventors

Suwon-si, South Korea

Sung Yi