Applied Materials, Inc.

Other

Sum-Yee Betty Tang

Martin Jay Seamons

Wendy H Yeh

Kwangduk Douglas Lee

Sudha S Rathi

Matthew Spuller

Hoiman Raymond Hung

Deenesh Padhi

Bok Hoen Kim

Visweswaren Sivaramakrishnan

Hichem M'Saad

Hui W Chen

Jian Ding

Yuxiang May Wang

Michael C Kwan

Joseph P Caulfield

Chang-Lin Hsieh

Lester A D'Cruz

Sudha S R Rathi

Andy (Hsin Chiao) Luan

Priya Kulkarni

Yves Pierre Boiteux

Ivano Gregoratto

May Yuxiang Wang

Tianzong Xu

A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.

Graded ARC for high NA and immersion lithography

Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein the processing gas comprises a carrier gas, hydrogen, and one or more precursor compounds, generating a plasma of the processing gas by applying power from a dual-frequency RF source, and depositing an amorphous carbon layer on the substrate.

Liquid precursors for the CVD deposition of amorphous carbon films

The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH F /Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material ( ) deposited on a layer of silicon oxide ( ) were etched according to the novel technique, forming relatively narrow trenches ( and ) and wider trenches ( and ). The technique is also suitable for forming dual damascene structures ( and ). In additional embodiments, manufacturing systems ( ) are provided for fabricating IC structures of the present invention. These systems include a controller ( ) that is adapted for interacting with a plurality of fabricating stations ( and ).

Etch process for dielectric materials comprising oxidized organo silane materials

A mixed-frequency, high temperature PECVD process is utilized to create a high quality silicon nitride layer having highly conformal properties. Deposition in an ammonia rich ambient at high temperature reduces microloading between dense and isolated features by improving surface mobility of precursors. High quality nitride films formed by the instant process are particularly suited for front-end applications such as the formation of spacer structures and the formation of contact etch stop layers.

Mixed frequency high temperature nitride CVD process

An integrated in situ oxide etch process particularly useful for a counterbore dual-damascene structure over copper having in one inter-layer dielectric level a lower nitride stop layer, a lower oxide dielectric, a lower nitride stop layer, an upper oxide dielectric layer, and an anti-reflective coating (ARC). The process is divided into a counterbore etch and a trench etch with photolithography for each, and each step is preferably performed in a high-density plasma reactor having an inductively coupled plasma source primarily generating the plasma and a capacitively coupled pedestal supporting the wafer and producing the bias power. The counterbore etch preferably includes at least four substeps of opening the ARC, etching through the upper oxide and nitride layers, selectively etching the lower oxide layer but stopping on the lower nitride layer, and a post-etch treatment for removing residue. The trench etch preferably includes the five substeps of opening the ARC, etching through the upper oxide layer but stopping on the upper nitride layers, a first post-etch treatment for removing residue, a nitride removal of the exposed portions of the upper and lower nitride layers, and a second post-etch treatment for remaining further residues. The oxide etches selective to nitride are accomplished using a fluorocarbon chemistry with high bias and a high temperature for a silicon-based scavenger for fluorine placed next to the plasma. The nitride etches and removal are accomplished by adding an oxygen-containing gas to a fluorocarbon. The final nitride removal is accomplished with very low bias power to increase selectivity to nitride and reduce sputtering of the underlying copper. The post-etch treatments are oxygen plasmas with zero bias power.

In-situ integrated oxide etch process particularly useful for copper dual damascene

Growing community of inventors

San Jose, CA, United States of America

Sum-Yee Betty Tang