Samsung Electronics Co., Ltd.

Neolab Convergence Inc.

Suk-Joo Lee

Han-Ku Cho

Doo-youl Lee

Gi-Sung Yeo

Cha-Won Koh

Sung-Gon Jung

Pan-suk Kwak

Joong-won Jeon

Yong-Jin Chun

Jong-Doo Kim

Sang-Gyun Woo

Seong-sue Kim

Yool Kang

Woo-Sung Han

Hee-Sung Kang

Ji-young Lee

Sung-Woo Lee

Seong-woon Choi

Jung-hyeon Lee

Dal-Hee Lee

Chang-jin Kang

Jin-hong Park

Dae-youp Lee

Sung-Chan Park

Se-Jin Park

Young-Chang Kim

Hye-Soo Shin

Sung-Soo Suh

Ji-Youn Song

Jeung-woo Lee

Seong-Yul Park

Sang-gyu Lee

Byoung-Il Choi

Min-jong Hong

Jae-ok Yoo

Mun-Su Shin

Yoon-Ho Jeon

Young-Deok Kwon

Dae-Ho Yoon

A method for fabricating a semiconductor device is provided. The method for fabricating the semiconductor device includes forming an interlayer insulating layer that comprises a first region and a second region, forming an etch stop pattern for exposing the second region in the first region of the interlayer insulating layer and forming a mask pattern that comprises a first via-hole that exposes an upper surface of the etch stop pattern and a second via-hole that penetrates the interlayer insulating layer on the interlayer insulating layer and the etch stop pattern.

Method for fabricating semiconductor device including a via hole in a mask pattern

A method of detecting focus shift in a lithography process, a method of analyzing an error of a transferred pattern using the same, and a method of manufacturing a semiconductor device using the methods are provided. The focus shift detecting method of a lithography process comprises generating a first contour band of a mask pattern between a first focus and a second focus, generating a second contour of the mask pattern between the first focus and a third focus, and determining whether focus shift of the mask pattern occurs using an intersection of the first contour band and the second contour band.

Method of detecting focus shift in lithography process, method of analyzing error of transferred pattern using the same and method of manufacturing semiconductor device using the methods

A method of designing patterns of semiconductor devices includes forming a plurality of tiles having patterns on a wafer, measuring the patterns of the plurality of tiles, analyzing the measurements of the patterns and determining a tile having such a size that the measurements linearly vary according to a design size and pattern density, and modifying the pattern density of the determined tile.

Method of designing patterns of semiconductor devices in consideration of pattern density

A mask for photolithography and methods of manufacturing a mask and a semiconductor device are provided. The method of manufacturing a mask may comprise providing a substrate, forming a phase shift material layer on the substrate, forming a light blocking layer on the phase shift material layer, and forming a main pattern and a sub pattern on the substrate by patterning the phase shift material layer and the light blocking layer. The light blocking layer may be removed on the main pattern left on the light blocking layer remaining on the sub pattern. A semiconductor device may be manufactured using the mask to form a photoresist pattern on a semiconductor wafer. The pattern of the photoresist may be used to etch an object layer of the semiconductor wafer.

Mask for photolithography, method for fabricating the same and method for manufacturing semiconductor device using the mask

A method and apparatus are provided to manage contents in a network, and a web server used thereto. A memory is configured to store a code output with a printed matter and mapping information of contents, which are executed by a reader reading the code. A receiver is configured to receive a request from the reader to transmit the mapping information. A transmitter is configured to transmit the mapping information to the reader. When the code outputted to the printed matter is read, the contents executed in the reader are changed into various contents such that the changed contents are used. In addition, a product user and a product seller obtain the learning information of a learner through the reader, or product application information.

Method and apparatus to manage contents in network and web server used thereto

A semiconductor device includes a logic region disposed in a central region of the semiconductor device, and a peripheral region disposed in an outer region thereof. The logic region includes a line-shaped logic transistor and a box-shaped decoupling capacitor. The peripheral region includes a line-shaped peripheral transistor and a line-shaped peripheral dummy transistor disposed adjacent to the peripheral transistor.

Semiconductor device having decoupling capacitors and dummy transistors

A method of forming a line/space pattern includes forming a plurality of first pattern structures on a layer of hard mask material disposed on a substrate, forming a plurality of second pattern structures along sidewalls of the first pattern structures, removing the first pattern structures such that the second pattern structures stand alone on the layer of hard mask material, forming a first mask that exposes a location where a space of the line/space pattern to be formed is to have a width greater than the distance between adjacent ones of the second pattern structures, removing those of the second pattern structures which are exposed by the first mask such that others of the second pattern structures remain on the layer of hard mask material, forming a second mask that covers a location where a line of the line/space pattern to be formed is to have a width that is greater than the widths of the second pattern structures, forming a hard mask by etching the hard mask material layer using the second mask and the remaining second pattern structures as an etch mask, and etching the substrate using the hard mask as an etch mask.

Method of forming line/space patterns

A method of forming fine patterns on a semiconductor substrate includes forming a first pattern, including first line patterns having a feature size F and an arbitrary pitch P, and forming a second pattern, including second line patterns disposed between adjacent first line patterns, to form a fine pattern having a half pitch P/2, the first and second line patterns being repeated in the first direction. A gap is formed in at least one first line pattern in a second direction, perpendicular to the first direction, to connect second line patterns positioned on each side of the first line pattern through the gap. At least one jog pattern, extending in the first direction, is formed from at least one first line pattern adjacent to the connected second line patterns. The jog pattern causes a gap in at least one of the connected second line patterns in the second direction.

Method of forming fine patterns of semiconductor device

Provided are a compensating mask, a multi-optical system using the compensating mask, and a method of compensating for a 3-dimensional (3-D) mask effect using the compensating mask. Methods of compensating for a 3-D mask effect using a compensating mask may include generating a first kernel corresponding to a normal mask used for forming a minute pattern, generating a second kernel corresponding to a compensating mask, mixing the first kernel corresponding to the normal mask with the second kernel corresponding to the compensating mask, and generating a multi-optical system kernel corresponding to mixing the first kernel and the second kernel.

Compensating masks, multi-optical systems using the masks, and methods of compensating for 3-D mask effect using the same

A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Method for forming fine patterns of a semiconductor device using a double patterning process

A method of forming a semiconductor device includes forming a first mask pattern on a target layer, the first mask pattern exposing a first portion of the target layer, forming an intermediate material layer, including depositing an intermediate material layer film on a side of the first mask pattern and the first portion of the target layer, and thinning the intermediate material layer film to form the intermediate material layer, forming a second mask pattern that exposes a second portion of the intermediate material layer, removing the exposed second portion of the intermediate material layer to expose the target layer, and patterning the target layer using the first and second mask patterns as patterning masks.

Method of forming a semiconductor device

A reflective photomask for EUV light is disclosed. The reflective photomask may include a projecting pattern selectively formed on a substrate and a reflective layer on the substrate and the projecting pattern.

Reflective photomask and method of fabricating the same

Provided are a flash memory device and a method of manufacturing the same. The flash memory device includes strings. Each of the strings has a string selection line, a ground selection line, and an odd number of word lines formed between the string selection line and the ground selection line.

Flash memory device using double patterning technology and method of manufacturing the same

In the method of forming a mask structure, a first mask is formed on a substrate where the first mask includes a first mask pattern having a plurality of mask pattern portions having openings therebetween and a second mask pattern having a corner portion of which an inner side wall that is curved. A sacrificial layer is formed on the first mask. A hard mask layer is formed on the sacrificial layer. After the hard mask layer is partially removed until the sacrificial layer adjacent to the corner portion is exposed, a second mask is formed from the hard mask layer remaining in the space after removing the sacrificial layer. A minute pattern having a fine structure may be easily formed on the substrate.

Method of forming a mask structure and method of forming a minute pattern using the same

A method of forming fine patterns in a semiconductor device through a double photo lithography process. A layer to be etched and a hard mask layer are sequentially formed on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. The layer to be etched is then etched using the second hard mask layer pattern after the second photo resist pattern has been removed, resulting in patterns have line edges without rounding.

Growing community of inventors

Yongin-si, South Korea

Suk-Joo Lee