Samsung Electronics Co., Ltd.

Subramanya Mayya

Xiaofeng Wang

In-Seok Yeo

ZongLiang Huo

Dong-Woo Kim

Min-Young Park

Ik-Soo Kim

Yool Kang

Hong-Sik Yoon

Seok-Hwan Oh

Sun-Woo Lee

Hee-Seok Kim

Takahiro Yasue

Hyun-Suk Kwon

Seong-Ho Moon

Methods of forming photoresist patterns may include forming a photoresist layer on a substrate, exposing the photoresist layer using an exposure mask, forming a preliminary pattern by developing the exposed photoresist layer and treating a surface of the preliminary pattern using a treatment agent that includes a coating polymer.

Methods of forming photoresist patterns

A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Nano line structures in microelectronic devices

Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to the semiconductor chip. The rechargeable micro-battery includes a first current collector and a second current collector, which face each other, a first polarizing electrode in contact with the first current collector and facing the second current collector, a second polarizing electrode in contact with the second current collector and facing the first polarizing electrode, and an electrolyte layer formed between the first and second polarizing electrodes.

Data storage device having self-powered semiconductor device

In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.

Memory devices having a carbon nanotube

Methods of forming nano line structures in microelectronic devices

Growing community of inventors

Gyeonggi-do, South Korea

Subramanya Mayya