International Business Machines Corporation

Steven Michnowski

Franco Motika

Donato Orazio Forlenza

Orazio Pasquale Forlenza

Phillip J Nigh

Richard Frank Rizzolo

Bryan J Robbins

Todd Michael Burdine

William James Hurley

Joseph E Eckelman

James Bernard Webb

Thomas G Foote

Rocco E DeStefano

An apparatus, program product and method utilize an ABIST circuit provided on an integrated circuit device to assist in the identification and location of defects in a scan chain that is also provided on the integrated circuit device. In particular, a defect in a scan chain may be detected by applying a plurality of pattern sets to a scan chain coupled to an ABIST circuit, collecting scan out data generated as a result of the application of the plurality of pattern sets to the scan chain, and using the collected scan out data to identify a defective latch in the scan chain.

ABIST-assisted detection of scan chain defects

An exemplary embodiment of the invention is a method for LBIST testing integrated circuit. The method includes generating a plurality of multi-bit test patterns and grouping the multi-bit test patterns by a plurality of test pattern partitions including a first test pattern partition having a first number of bits and a second test pattern partition having second number of bits greater than the first number. The first test pattern partition is applied to the integrated circuit to generate a first signature that is compared to a first reference signature to detect a failure. The second test pattern partition is applied to the integrated circuit to generate a second signature that is compared to a second reference signature to detect a failure in the integrated circuit.

Method and system for determining repeatable yield detractors of integrated circuits

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Wappingers Falls, NY, United States of America

Steven Michnowski