Applied Materials, Inc.

Other

Appleid Materials, Inc

Steve S Y Mak

Jeng H Hwang

Chentsau Chris Ying

Yan Ye

Kang-Lie Chiang

Michael S Barnes

John Patrick Holland

Avi Tepman

Hong Shih

Peter K Loewenhardt

Xikun Wang

Diana Xiaobing Ma

Hui W Chen

Donald J Olgado

Gerald Zheyao Yin

True-Lon Lin

Jonathan David Mohn

Patrick Leahey

Anbei Jiang

Guang Xiang Jin

John W Schaller

A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma reactor. The ARC open uses either BCl/Clor Cland possibly a hydrocarbon passivating gas, preferably CH. The aluminum main etch preferably includes BCl/Cletch and CHdiluted with He. The dilution is particularly effective for small flow rates of CH. An over etch into the Ti/TiN barrier layer and part way into the underlying dielectric may use a chemistry similar to the main etch. A Cl/Ochamber cleaning may be performed, preferably with the wafer removed from the chamber and after every wafer cycle.

Fluorine free integrated process for etching aluminum including chamber dry clean

A method of etching a noble metal electrode layer disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.35 &#x3bc;m and having a noble metal profile equal to or greater than about 80&#xb0;. The method comprises heating the substrate to a temperature greater than about 150&#xb0; C., and etching the noble metal electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising a gas selected from the group consisting of nitrogen, oxygen, a halogen (e.g., chlorine), argon, and a gas selected from the group consisting of BCl, HBr, and SiClmixtures thereof. Masking methods and etching sequences for patterning high density RAM capacitors are also provided.

Masking methods and etching sequences for patterning electrodes of high density RAM capacitors

A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150&deg; C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl , HBr, SiCl and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 &angst;.

Method of etching an anisotropic profile in platinum

A method and apparatus for use in conjunction with a plasma reaction chamber provide both throttling functionality and independent vacuum isolation for a turbomolecular pump. A throttle valve provides for precise reaction chamber pressure regulation, and a gate valve prevents extended exposure of the turbomolecular pump to atmospheric conditions during cleaning or other maintenance operations. The throttle valve and the gate valve may be actuated independently.

Compact independent pressure control and vacuum isolation for a turbomolecular pumped plasma reaction chamber

A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150&deg; C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl,, HBr, SiCl,and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 &angst;.

Etching methods for anisotropic platinum profile

An assembly for allowing stable power transmission into a plasma processing chamber comprising a dielectric member; and at least one material deposition support assembly secured to the dielectric member for receiving and supporting the deposition of materials during processing of a substrate and a chamber having a controlled environment and containing a plasma of a processing gas. A plasma reactor for processing substrates having a reactor chamber including a chamber sidewall and a dielectric window supported by the chamber sidewall. A plurality of deposition support members is coupled to an inside surface of the dielectric window for receiving and supporting a deposition of materials during processing of substrates. In an alternative embodiment of the invention, the plurality of deposition support members is connected to a liner assembly instead of to the dielectric window. The liner assembly is supported by the chamber sidewall. A pedestal is disposed in the reactor chamber for supporting substrates, such as semiconductor wafers, in the reacting chamber. The plasma reactor also includes a processing power source, a processing power gas-introducing assembly for introducing processing gas into the reactor chamber, and a processing power-transmitting member for transmitting power into the reactor interior to aid in sustaining a plasma from the processing gas within the reacting chamber. A method for adjusting the density of plasma contained in a chamber wherein substrates are to be processed. A method of processing (e.g. etching or depositing) a metal layer disposed on a substrate.

Apparatus and method for shielding a dielectric member to allow for stable power transmission into a plasma processing chamber

An RF plasma etch reactor having an etch chamber with electrically conductive walls and a protective layer forming the portion of the walls facing the interior of the chamber. The protective layer prevents sputtering of material from the chamber walls by a plasma formed within the chamber. The etch reactor also has an inductive coil antenna disposed within the etch chamber which is used to generate the plasma by inductive coupling. Like the chamber walls, the inductive coil antenna is constructed to prevent sputtering of the material making up the antenna by the plasma. The coil antenna can take on any configuration (e.g. location, shape, orientation) that is necessary to achieve a desired power deposition pattern within the chamber. Examples of potential coil antenna configurations for achieving the desired power deposition pattern include constructing the coil antenna with a unitary or a segmented structure. The segmented structure involves the use of at least two coil segments wherein each segment is electrically isolated from the other segments and connected to a separate RF power signal. The unitary coil antenna or each of the coil segments can have a planar shape, a cylindrical shape, a truncated conical shape, a dome shape, or any combination thereof. The conductive walls are electrically grounded to serve as an electrical ground (i.e. anode) for a workpiece-supporting pedestal which is connected to a source of RF power to create a bias voltage at the surface of the workpiece.

RF plasma method

A method of etching an electrode layer (e.g., a platinum electrode layer or an iridium electrode layer) disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.3 &mgr;m and having a profile equal to or greater than about 85&deg;. The method comprises heating the substrate to a temperature greater than about 150&deg; C., and etching the electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising oxygen and/or chlorine, argon and a gas selected from the group consisting of BCl,, HBr, HCl and mixtures thereof. A semiconductor device having a substrate and a plurality of electrodes supported by the substrate. The electrodes have a dimension (e.g., a width) which include a value equal to or less than about 0.3 &mgr;m and a profile equal to or greater than about 85&deg;.

Iridium etchant methods for anisotropic profile

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Pleasanton, CA, United States of America

Steve S Y Mak