International Business Machines Corporation

International Business Corporation

Stephen Joseph Fuerniss

Voya Rista Markovich

Natalie Barbara Feilchenfeld

Konstantinos I Papathomas

Michael A Gaynes

John M Lauffer

Mark Vincent Pierson

David John Russell

Donald Seton Farquhar

Anilkumar Chinuprasad Bhatt

David W Wang

William E Wilson

Roy H Magnuson

Gary A Johansson

Anthony P Ingraham

Ross William Keesler

Francis Joseph Downes, Jr

Jaynal Abedin Molla

Gary Ray Hill

Peter A Moschak

Pat Hoontrakul

Deborah Lynn Dittrich

Jeffrey Donald Gelorme

Frank Daniel Egitto

Alfred Viehbeck

David Brian Stone

Jeffrey Curtis Hedrick

David L Questad

Luis Jesus Matienzo

John Joseph Konrad

Elizabeth F Foster

Stephen L Tisdale

Charles Robert Davis

Christina Marie Boyko

Paul George Rickerl

Michael Joseph Klodowski

Timothy Leroy Wells

Richard Allen Day

Jeffrey McKeveny

Ernest Bassous

James Steven Kamperman

Gobinda Das

Joseph Alphonse Kotylo

Michael R Scheuermann

Norman A Card

Anastasios Peter Angelopoulos

Lawrence Robert Blumberg

Bernd Karl-Heinz Appelt

Walter P Pawlowski

John J Glenning

Jeffrey Alan Zimmerman

Giana M Phelan

Donald J Mikalsen

Thomas H Lewis

Darbha Suryanarayana

Norman L Shaver

A method for forming an electronic structure. Provides is a layer that includes a cylindrical volume of a photoimageable dielectric (PID) material, an annular volume of the PID material circumscribing the cylindrical volume, and a remaining volume of the PID material circumscribing the annular volume. The layer is photolithograhically exposed to radiation. The annular volume is fully cured by the radiation. The remaining volume is partially cured by the remaining volume by said radiation. The method prevents curing of the cylindrical volume, wherein the PID material in the cylindrical volume remains uncured.

Forming a through hole in a photoimageable dielectric structure

An electronic package assembly where a low profile integrated circuit chip package is soldered to an organic (e.g., epoxy resin) substrate, e.g., a printed circuit board or card, the projecting conductive leads of the integrated circuit chip package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with ultraviolet photocured encapsulant material (e.g., polymer resin) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder.

Lead protective coating composition, process and structure thereof

A structure comprising a metallic surface, a layer of a polymeric material and a water soluble polymeric material located between the metallic surface and the layer of polymeric material, and process of fabricating such are provided. The structure exhibits enhanced adhesion between the metallic surface and the polymeric material.

Promoting adhesion between a polymer and a metallic substrate

A method for forming a dielectric structure. A first layer is formed, wherein the first layer includes a first fully cured photoimageable dielectric (PID) material. A sticker lays is nonadhesively formed on the first layer, wherein the sticker layer includes a partially cured PID material. A second layer is nonadhesively formed on the sticker layer, wherein the second layer includes a second fully cured PID material, wherein the sticker layer is nonadhesively sandwiched between the first layer and the second layer such that the sticker layer is in non-adhesive contact with the first layer and in non-adhesive contact with the second layer, and wherein the sticker layer is capable of remaining in non-adhesive contact with the first layer and the second layer until the sticker layer is subsequently subjected to additional curing.

Dielectric structure and method of formation

An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.

Through hole in a photoimageable dielectric structure with wired and uncured dielectric

A dielectric structure, wherein two fully cured photoimageable dielectric (PID) layers of the structure are nonadhesively interfaced by a partially cured PID layer. The partially cured PID layer includes a power plane sandwiched between a first partially cured PID sheet and a second partially cured PID sheet. The fully cured PID layers each include an internal power plane, a plated via having a blind end conductively coupled to the internal power plane, and a plated via passing through the fully cured PID layer. The dielectric structure may further include a first PID film partially cured and nonadhesively coupled to one of the fully cured PID layers. The dialectric structure may further include a second PID film partially cured and nonadhesively coupled to the other fully cured PID layer.

Through-holes in a substrate are masked during plating of the substrate by substantially filling the through-holes with a liquid material, followed by applying a photoimageable material to an external surface of the substrate, forming a predetermined pattern in the photoimageable material, circuitizing the predetermined pattern and then removing both the photoimageable material and the liquid material from the through-holes.

Method for masking a hole in a substrate during plating

Disclosed is a sculpted probe pad and a gray scale etching process for making arrays of such probe pads on a thin flexible interposer for testing the electrical integrity of microelectronic devices at terminal metallurgy. Also used in the etching process is a novel fixture for holding the substrate and a novel mask for 1-step photolithographic exposure. The result of the invention is an array of test probes of preselected uniform topography, which make ohmic contact at all points to be tested simultaneously and nondestructively.

Gray scale etching for thin flexible interposer

Chip carrier packages, integrated circuits, wiring boards, and assemblies in computer systems are made having conductive adhesive interconnections. Electrically conductive polymer paste with metal particles and powders are used with photoimagable polymer films to form the interconnection structure. These articles are produced with screening and printing processes using a screening head and printing machine.

Component carrier with raised bonding sites

According to the present invention a technique for providing a planarized substrate with dendritic connections of solder balls, especially a multi-layer ceramic substrate is provided. In the case where the substrate has a raised central portion on the top surface on which are disposed top surface metallurgy pads, a layer of conformable photoimagable material is placed over the top surface. The photoimagable material is exposed and developed in a pattern corresponding to the pattern of the top surface metallurgy pads to form vias in the photoimagable material. Copper is plated in the vias in contact with the top surface metallurgy pads. The exposed surface of the photoimagable surface is then planarized, preferably by mechanical polishing to form a flat planar surface, with the ends of the vias exposed. Dendritic connector pads are then grown on the exposed ends of the vias to which solder ball connections of an I/C chip are releasably connected.

Method of planarizing a curved substrate and resulting structure

An electronic package assembly where a low profile integrated circuit chip package is soldered to an organic (e.g., epoxy resin) substrate, e.g., a printed circuit board or card, the projecting conductive leads of the integrated circuit chip package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with ultraviolet photocured encapsulant material (e.g., an epoxy resin or a cyanate with a photoinitiator and silica) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder.

Encapsulating a solder joint with a photo cured epoxy resin or cyanate

A method for filling a hole in a printed wiring board (PWB) and the resultant PWB. During an intermediate stage in fabrication, a PWB comprises a lamination of dielectric sheets with metalizations on various layers and a plated through hole (PTH). A photoimageable material is formed on a surface of the laminate and covers the PTH. The photoimageable material in a region covering the PTH is partially cured by exposure to light. The remainder of the photoimageable material is developed away. Then, the partially cured photoimageable material in the region of the PTH is pressed into the PTH to form a plug. By application of heat during or after the forcing step, the plug is further cured to a hard condition. For some applications, the plug is mechanically abraded to be flush with one or both surfaces of the laminate. The plug can serve as a solder mask or permit another layer of low viscosity photoimageable material to be formed over the laminate such that the hole, now plugged, will not interfere with the formation of such additional layer.

Method for filling holes in printed wiring boards

Disclosed is an admixture which is curable to form a crack resistant, photosensitive polycyanurate resist. Also disclosed is a structure for its use and process of making. The resist can be tailored to be either positively or negatively sensitive to actinic radiation. Because of its improved thermal and mechanical properties, the cured resist is suitable for use at high temperature, such as in electronic packaging applications.

Toughened photosensitive polycyanurate resist, and structure made

Reinforcement members are disposed along only the transverse edge regions of selected flexible cables of an integral chip carrier and cable assembly, and along only the respectively aligned end areas of the chip carrier portion of the assembly. The reinforcement members may be disposed along all of the flexible cables and end areas of the assembly, or on only selected cable and end area portions of the assembly. The reinforcement members are formed of a tough tear resistant polymer material, such as a hot melt adhesive or polymer tape or film.

Chip carrier and cable assembly reinforced at edges

Growing community of inventors

Endicott, NY, United States of America

Stephen Joseph Fuerniss