International Business Machines Corporation

Applied Materials, Inc.

Stephen Bruce Brodsky

Richard Anthony Conti

Rajiv V Joshi

Cyril Cabral, Jr

William Joseph Murphy

Seshadri Subbanna

Badih El-Kareh

Daniel Scott Vanslette

Matthew J Rutten

David Craig Strippe

Karanam Balasubramanyam

Kie Y Ahn

Yun Yu Wang

Christian Lavoie

Dominic Joseph Schepis

Yun-Yu Wang

Hussein Ibrahim Hanafi

Kwong Hon Wong

James Gardner Ryan

Anthony Gene Domenicucci

Roy Arthur Carruthers

Kenneth John Giewont

Diane Catherine Boyd

Dan Moy

Howard E Grunes

Ronnen Andrew Roy

Michael Rosenstein

Horatio Seymour Wildman

James McKell Edwin Harper

John S Lechaton

Patricia A O'Neil

Charles A Cortellino

Craig M Ransom

Joseph E Levine

Saryadevara Basavaiah

A method of forming inter-level contacts or vias between metal layers using a tungsten film deposited into the via using non-collimated sputter deposition. The sputter chamber is configured with a pressure of about 1 mTorr to about 10 mTorr with an inert gas flow of at least 25 cm/min to about 150 cm/min. Shielding inside the chamber is coated with a material, preferably, aluminum oxide, that promotes adhesion of tungsten to the shielding. An adhesion layer of titanium may be included prior to deposition of the tungsten film. Non-collimated sputter deposition increases the target to substrate distance inside the sputter chamber; reduces the heating effect associated with traditional collimated sputtering; and provides more robust diffusion barriers.

Sputtered tungsten diffusion barrier for improved interconnect robustness

A sub-0.1 &mgr;m MOSFET device having minimum poly depletion, salicided source and drain junctions and very low sheet resistance poly-gates is provided utilizing a damascene-gate process wherein the source and drain implantation activation annealing and silicidation occurs in the presence of a dummy gate region which is thereafter removed and replaced with a polysilicon gate region.

Damascene-gate process for the fabrication of MOSFET devices with minimum poly-gate depletion, silicided source and drain junctions, and low sheet resistance gate-poly

A capping layer for a semiconductor structure is described. The capping layer is deposited over a silicide-forming metal and has a composition such that nitrogen diffusion therefrom is insufficient to cause formation of an oxynitride from an oxide layer on the underlying silicon. The capping layer may be a metal layer from which no N diffusion occurs, or one or more layers including Ti and/or TiN arranged so that N atoms do not reach the oxide layer. A method is also described for forming the Ti and TiN layers. It is advantageous to deposit non-stoichiometric TiN deficient in N, by sputtering from a Ti target in a nitrogen flow insufficient to cause formation of a nitride on the target.

Capping layer for improved silicide formation in narrow semiconductor structures

A method of substantially reducing Si consumption and bridging during metal silicide contact formation comprising the steps of: (a) forming a metal silicon alloy layer over a silicon-containing substrate containing an electronic device to be electrically contacted, said silicon in said alloy layer being less than about 30 atomic % and said metal is Co, Ni or mixtures thereof; (b) annealing said metal silicon alloy layer at a temperature of from about 300&deg; to about 500&deg; C. so as to form a metal rich silicide layer that is substantially non-etchable compared to said metal silicon alloy or pure metal; (c) selectively removing any non-reacted metal silicon alloy over non-silicon regions; and (d) annealing said metal rich silicide layer under conditions effective in forming a metal silicide phase that is in its lowest resistance phase. An optional oxygen barrier layer may be formed over the metal silicon alloy layer prior to annealing step (b).

Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging

A method of forming inter-level contacts or vias between metal layers using a tungsten film deposited into the via using non-collimated sputter deposition. The sputter chamber is configured with a pressure of about 1 mTorr to about 10 mTorr with an inert gas flow of at least at least 25 cm,/min to about 150 cm,/min. Shielding inside the chamber is coated with a material, preferably, aluminum oxide, that promotes adhesion of tungsten to the shielding. An adhesion layer of titanium may be included prior to deposition of the tungsten film. Non-collimated sputter deposition increases the target to substrate distance inside the sputter chamber; reduces the heating effect associated with traditional collimated sputtering; and provides more robust diffusion barriers.

A MOSFET device is formed on a P- doped semiconductor substrate with an N- well formed therein, with a pair of isolation regions formed in the N- well with a gate oxide layer formed above the N- well. An FET device is formed with source and drain regions within the N-well, and a gate electrode formed above the gate oxide layer aligned with the source and drain regions. The gate electrode comprises a stack of layers. A polysilicon layer is formed on the gate oxide layer. A tungsten nitride dopant barrier layer is formed upon the polysilicon layer having a thickness of from about 5 nm to about 20 nm, and a tungsten silicide layer is formed upon the tungsten nitride layer.

Controlled dopant diffusion and metal contamination in thin polycide

A method and the device produced by the method of selective refractory metal growth/deposition on exposed silicon, but not on the field oxide is disclosed. The method includes preconditioning a wafer in a DHF dip followed by the steps of 1) selectively depositing a refractory metal on the exposed surfaces of the silicon substrate by reacting a refractory metal halide with the exposed surfaces of said silicon substrate; 2) limiting silicon substrate consumption by reacting the refractory metal halide with a silicon containing gas; and 3) further increasing the refractory metal thickness by reacting the refractory metal halide with hydrogen. Through an adequate pretreatment and selection of the parameters of 1) temperature; 2) pressure; 3) time; 4) flow and 5) flow ratio during each of the deposition steps, this invention adequately addresses the difficulties of uneven n+ versus p+ (source/drain) growth, deep consumption/encroachment by the refractory metal into silicon regions (e.g., worm holes), poor adhesion, uncontrolled selectivity and uneven morphology.

Device formed by selective deposition of refractory metal of less than

Method of controlling dopant diffusion and metal contamination in thin

Method for selective deposition of refractory metal and device formed

A structure and method is described for securing an overspray shield in processing chambers in the wall sandwich of the chamber or using a dimensionally compliant floating spacer ring to elastically clamp the overspray shield in position in a vacuum substrate processing chamber without the use of removable fasteners. The configuration uses the differential pressures between the inside and outside of the chamber to clamp the overspray shield along with its shield clamping assembly components at a spacer position in the chamber. The spacer position is generally interior to vacuum sealing limits of the chamber. The arrangement is such that if misalignment occurs a good vacuum-type seal cannot be achieved unless the parts are moved to correct alignment. When correctly aligned the overspray shield is tightly held to the processing chamber wall and electrical continuity between the processing chamber wall and the overspray shield is assured throughout expected process conditions.

Screwless shield assembly for vacuum processing chambers

A contact is provided in a self-aligned manner to a doped region a semiconductor substrate by first forming a layer of a transition metal-boride compound over a selected region on the substrate. A layer of a transition metal-nitride compound is formed over the layer of transition metal-boride compound, and the structure is heated to drive dopant from the layer of transition metal-boride compound into the substrate. The transition metal-boride/transition metal nitride layers are patterned to leave a contact to the doped region.

Method of making semiconductor device contact including transition

A gate structure for integrated circuit devices which includes a work function layer, a low resistivity layer, and an electrically conductive barrier layer between the two other layers to prevent the other two layers from intermixing. The work function controlling layer is preferably selected from the group of tungsten, molybdenum, their silicides, or a combination thereof.

Stacked metal silicide gate structure with barrier

A mask for deposition of electrically-conductive paste material on a ceramic base, in the construction of electric circuits having multiple electronic chips is formed of molybdenum with a titanium nitride coating. The coating passes through apertures of a mesh on one side of the mask and continues through the apertures to appear in cutouts of stencils along the opposite side of the mask. Other elements of the fourth group of the periodic table, such as zirconium, may be employed in lieu of the titanium in the formation of the coating. The coating is uniformly applied by a sputtering procedure in which nitrogen is sprayed uniformly along the mask and away from a titanium target. In an argon plasma, the nitrogen and the titanium are sputtered onto the molybdenum where the titanium and nitrogen combine to form the coating.

Coated mask for photolithographic construction of electric circuits

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Fishkill, NY, United States of America

Stephen Bruce Brodsky