Intel Corporation

Infineon Technologies Ag

Stephan Stoeckl

Georg Seidemann

Bernd Waidhas

Andreas Wolter

Thomas Wagner

Laurent Millou

Michael Bauer

Reinhard Mahnkopf

Andreas Augustin

Sonja Koller

Gerald Ofner

Sven Albers

Sandeep B Sane

Peter Strobel

Heinz Pape

Josef Hagn

Wolfgang Molzer

Shubhada H Sahasrabudhe

Christian Birzer

Rudolf Kerler

Wolfram Eurskens

Embodiments disclosed herein include semiconductor packages. In a particular embodiment, the semiconductor package is a wafer level chip scale package (WLCSP). In an embodiment, the WLCSP comprises a die. In an embodiment, the die comprises an active surface and a backside surface. The die has a first coefficient of thermal expansion (CTE). In an embodiment, the WLCSP further comprises a channel into the die. In an embodiment, the channel is filled with a stress relief material, where the stress relief material has a second CTE that is greater than the first CTE.

Stress relief die implementation

A patch antenna array is fabricated with a package-on-package setup that contains a transceiver. The patch antenna array has a footprint that intersects the transceiver footprint. The package-on-package setup includes through-mold vias that couple to a redistribution layer disposed between the patch antennas and the package-on-package setup.

Patch antennas stitched to systems in packages and methods of assembling same

A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.

Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory

An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two modules are mated at the patterned reference layer. At least one module includes a silicon bridge connector that bridges to two devices, through the patterned reference layer, to the mated module.

Embedded-bridge substrate connectors and methods of assembling same

A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.

Bent-bridge semiconductive apparatus

Disclosed herein are contact pads for use with integrated circuit (IC) packages. In some embodiments, a contact pad disclosed herein may be disposed on a substrate of an IC package, and may include a metal projection portion and a metal recess portion. Each of the metal projection portion and the metal recess portion may have a solder contact surface. The solder contact surface of the metal recess portion may be spaced away from the solder contact surface of the metal projection portion. Related devices and techniques are also disclosed herein, and other embodiments may be claimed.

Contact pads for integrated circuit packages

The invention relates to a module comprising a carrier element having a lower stiffness or a different structure in a first region than in a second region, and also comprising a component applied to the carrier element. The component and the first region are connected to one another by a wire connection covered by a material.

Module with carrier element

An electronic module and a method for the production thereof is disclosed. In one embodiment, the electronic module has a plurality of components arranged on a wiring block. The wiring block has a plurality of outer sides and has in its volume lines interconnecting contact pads on the outer sides. The contact pads are electrically connected to component connections of the components.

Electronic module and method for the production thereof

An electronic module contains a semiconductor chip that has flexible chip contacts. The flexible chip contacts are disposed on an uppermost metallization layer and have a dimensionally stable contact plate which is connected to contact surfaces on the uppermost metallization layer via electrically conductive components in an elastomeric embedding compound.

Growing community of inventors

Schwandorf, Germany

Stephan Stoeckl