Infineon Technologies Ag

Qimonda Ag

Stefan Landau

Joachim Mahler

Henrik Ewe

Josef Hoeglauer

Anton Prueckl

Klaus Schiess

Erwin Huber

Thomas Wowra

Ralf Otremba

Ivan Nikitin

Alexander Heinrich

Robert Bergmann

Tino Karczeweski

Udo Ausserlechner

Manfred Mengel

Volker Strutz

Christian Fachmann

Frank Daeche

Reimund Engl

Uwe Kirchner

Thomas Behrens

Ralf Wombacher

Soon Lock Goh

Michael Juerss

Andreas Schloegl

Rupert Fischer

Alexander Koenigsberger

Eduard Knauer

Andreas Eder

Boris Plikat

Alvin Wee Beng Tatt

A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.

Laminate electronic device

A semiconductor device includes a carrier, a chip attached to the carrier, a sealant vapor deposited over the chip and the carrier, and encapsulation material deposited over the sealed chip and the sealed carrier.

Semiconductor device having a sealant layer including carbon directly contact the chip and the carrier

A multi-chip module and method is disclosed. One embodiment provides an electronic module having a first metal structure and a second metal structure. A first semiconductor chip is electrically connected with its back side to the first metal structure. A second semiconductor chip is arranged with its back side lying over the front side of the first semiconductor chip. The second metal structure includes multiple external contact elements attached over the front side of the second semiconductor chip. At least two of the multiple external contact elements are electrically connected to the front side of the second semiconductor chip.

Multi-chip module

A method and a system for a reliable LED semiconductor device are provided. In one embodiment, the device comprises a carrier, a light emitting diode disposed on the carrier, an encapsulating material disposed over the light emitting diode and the carrier, at least one through connection formed in the encapsulating material, and a metallization layer disposed and structured over the at least one through connection.

Method and system for providing a reliable light emitting diode semiconductor device

A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier.

Semiconductor device and method of manufacturing thereof

A semiconductor chip package and a method to manufacture a semiconductor chip package are disclosed. An embodiment of the present invention comprises a substrate and a semiconductor chip disposed on the substrate and laterally surrounded by a packaging material. The package further comprises a current rail adjacent the semiconductor chip, the current rail isolated from the semiconductor chip by an isolation layer, a first external pad, and a via contact contacting the current rail with the first external pad.

Semiconductor chip package and method

A device includes a first semiconductor chip with a first contact pad on a first face and a second semiconductor chip with a first contact pad on a first face. The second semiconductor chip is placed over the first semiconductor chip, wherein the first face of the first semiconductor chip faces the first face of the second semiconductor chip. Exactly one layer of an electrically conductive material is arranged between the first semiconductor chip and the second semiconductor chip. The exactly one layer of an electrically conductive material electrically couples the first contact pad of the first semiconductor chip to the first contact pad of the second semiconductor chip.

Device including two semiconductor chips and manufacturing thereof

An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 &#x3bc;m.

Electronic module

An electronic device and fabrication of an electronic device. One embodiment provides applying a paste including electrically conductive particles to a surface of a semiconductor wafer. The semiconductor wafer is singulated with the electrically conductive particles for obtaining a plurality of semiconductor chips. At least one of the plurality of semiconductor chips is placed over a carrier with the electrically conductive particles facing the carrier. The electrically conductive particles are heated until the at least one semiconductor chip adheres to the carrier.

Semiconductor device and method

A die arrangement includes a carrier having a first side and a second side opposite the first side, the carrier including an opening leading from the first side of the carrier to the second side of the carrier; a first die disposed over the first side of the carrier and electrically contacting the carrier; a second die disposed over the second side of the carrier and electrically contacting the carrier; and an electrical contact structure leading through the opening in the carrier and electrically contacting the second die.

Die arrangement and method of forming a die arrangement

A housing for a chip arrangement is provided, the housing including: a carrier including a first carrier side configured to receive a chip arrangement, a second carrier side and one or more through-holes extending from the first carrier side to the second carrier side; at least one electrical connector inserted through a through-hole, the at least one electrical connector arranged to extend from the second carrier side to the first carrier side; wherein the at least one electrical connector may include: a first portion on the first carrier side; a second portion on the first carrier side, wherein the first portion is configured to extend away from the first carrier side at an angle to the second portion; and a third portion on the second carrier side, wherein the third portion is configured to extend away from the second carrier side at an angle to the second portion.

Housing for a chip arrangement and a method for forming a housing

Method of manufacturing a laminate electronic device including separating a carrier into a plurality of parts

A method includes providing an integral array of first carriers, arranging first semiconductor chips on the first carriers, and arranging an integral array of second carriers over the semiconductor chips.

Method of manufacturing an integrated circuit module

A method of manufacturing a semiconductor device includes placing a chip on a carrier, and applying an electrically conducting layer to the chip and the carrier. The method additionally includes converting the electrically conducting layer into an electrically insulating layer.

Growing community of inventors

Wehrheim, Germany

Stefan Landau