Samsung Electronics Co., Ltd.

Soo-Jae Park

Young-hoon Kim

Chan-hee Jeong

In-ku Kang

Hee-yeol Kim

Yong-sang Cho

Hyun-Suk Chun

Moon-gi Cho

Yeon-sik Choo

Jae-Heon Noh

A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.

Printed circuit board and semiconductor package

A printed circuit board (PCB) is provided as follows. A first connection pad and a second connection pad are disposed on a first surface and a second surface of the base substrate layer, respectively. The first connection pad and the second connection pad each includes a first metal. A first pad cover layer covers a top surface of the first connection pad and includes an insulating metal oxide having a second metal different from the first metal.

Printed circuit board having insulating metal oxide layer covering connection pad

An integrated circuit package includes at least one first chip mounted in a first region of a mounting surface of a printed circuit board, a molding unit covering the mounting surface and surrounding the at least one first chip, an electromagnetic shielding film covering a surface of the molding unit and surrounding the at least one first chip, and a second chip mounted in a second region of the mounting surface. The second chip is exposed outside the electromagnetic shielding film and is spaced apart from the printed circuit board, with the molding unit being between the second chip and the printed circuit board.

Integrated circuit package including shielding between adjacent chips

Integrated circuit package, method of fabricating the same, and wearable device including integrated circuit package

A wafer carrier comprises a body part constructed and arranged to accommodate a wafer and including first and second layers which are stacked in sequence. A cover is mountable to the body part. A first air filter is positioned on the cover. A second air filter is positioned on a side of the body part. The second layer is positioned between the first layer and an inner region of the body part. A surface of the second layer facing the inner region is subjected to charge prevention processing.

Wafer carrier including air filters

The method includes forming an upper layer on a lower layer, forming a metal interconnection in the upper layer, forming a passivation layer exposing a center part of the metal interconnection on the upper layer, forming a buffer pattern exposing the center part of the metal interconnection, and selectively and asymmetrically covering a peripheral region of the metal interconnect and a part of the passivation layer, forming a wrapping pattern covering the buffer pattern and exposing the center part of the metal interconnection on the passivation layer, and forming a pad pattern on the center part of the metal interconnection.

Growing community of inventors

Asan-si, South Korea

Soo-Jae Park