Average Co-Inventor Count = 26.04
ph-index = 8
The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.
Company Filing History:
1. Pdf Solutions, Incorporated (82 from 203 patents)
82 patents:
1. 11107804 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
2. 11081476 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
3. 11081477 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
4. 11075194 - IC with test structures and E-beam pads embedded within a contiguous standard cell area
5. 11018126 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
6. 10978438 - IC with test structures and E-beam pads embedded within a contiguous standard cell area
7. 10854522 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas
8. 10777472 - IC with test structures embedded within a contiguous standard cell area
9. 10593604 - Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells
10. 10290552 - Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage
11. 10269786 - Integrated circuit containing first and second DOEs of standard Cell Compatible, NCEM-enabled Fill Cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including corner short configured fill cells
12. 10211111 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas
13. 10211112 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas
14. 10199294 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage
15. 10199289 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one chamfer short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective chamfer short, corner short, and via open test areas