Yangtze Memory Technologies Co., Ltd.

Sicong Wang

Xiaoye Ding

Yi Zhou

Systems and methods for measuring a surface topography of a semiconductor chip are disclosed. A disclosed system comprises a light source configured to provide low coherent light to a first beam splitter, a scanner configured to use the low coherent light reflected from the first beam splitter to scan positions on a surface of a semiconductor chip, a second beam splitter configured to receive reflected signals from the positions on the surface of the semiconductor chip, a detector configured to detect interference signals from a first output of the second beam splitter, wherein each of the interference signals corresponds to a respective one of the positions, and a spectrometer configured to detect spectrum signals from a second output of the second beam splitter, wherein each of the spectrum signals corresponds to the respective one of the positions.

Systems and methods for semiconductor chip surface topography metrology

Embodiments of systems and methods for measuring a surface topography of a semiconductor structure are disclosed. In certain examples, a plurality of interference signals, each corresponding to a respective one of a plurality of positions on a surface of the semiconductor structure, are measured. Calibration signals, associated with a baseline region corresponding to a first category of a plurality of categories and a calibrated region corresponding to a second category of the plurality of categories, are measured. A surface height offset, associated with the baseline region and the calibrated region, is determined based on original surface heights and the calibration signals. The original surface heights are determined based on the plurality of interference signals corresponding to the baseline region and the calibrated region. The surface topography of the semiconductor structure is characterized based, at least in part, on the surface height offset and the original surface heights.

Embodiments of systems and methods for measuring a surface topography of a semiconductor chip are disclosed. In an example, a method for measuring a surface topography of a semiconductor chip is disclosed. A plurality of interference signals and a plurality of spectrum signals are received by at least one processor. Each of the interference signals and spectrum signals corresponds to a respective one of a plurality of positions on a surface of the semiconductor chip. The spectrum signals are classified by the at least one processor into a plurality of categories using a model. Each of the categories corresponds to a region having a same material on the surface of the semiconductor chip. A surface height offset between a surface baseline and at least one of the categories is determined by the at least one processor based, at least in part, on a calibration signal associated with the region corresponding to the at least one of the categories. The surface topography of the semiconductor chip is characterized by the at least one processor based, at least in part, on the surface height offset and the interference signals.

Embodiments of systems for classifying interference signals are disclosed. In an example, a system for classifying interference signals includes an interferometer including a light source and a detector, and at least one processor. The interferometer is configured to provide a plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of a semiconductor chip. A spectrum of the light source is greater than a spectrum of white light. The at least one processor is configured to classify the interference signals into a plurality of categories using a model. Each of the categories corresponds to a region having a same material on the surface of the semiconductor chip.

Systems having light source with extended spectrum for semiconductor chip surface topography metrology

Embodiments of systems and methods for measuring a surface topography of a semiconductor chip are disclosed. In an example, a method for measuring a surface topography of a semiconductor chip is disclosed. A plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of the semiconductor chip are received by at least one processor. The interference signals are classified by the at least one processor into a plurality of categories using a model. Each of the categories corresponds to a region having a same material on the surface of the semiconductor chip. A surface height offset between a surface baseline and at least one of the categories is determined by the at least one processor based, at least in part, on a calibration signal associated with the region corresponding to the at least one of the categories. The surface topography of the semiconductor chip is characterized by the at least one processor based, at least in part, on the surface height offset and the interference signals.

Embodiments of systems and methods for measuring a surface topography of a semiconductor chip are disclosed. In an example, a method for measuring a surface topography of a semiconductor chip is disclosed. A plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of the semiconductor chip are received by at least one processor. The plurality of interference signals are transformed by the at least one processor into a plurality of spectrum signals each corresponding to the respective one of the positions on the surface of the semiconductor chip. The spectrum signals are classified by the at least one processor into a plurality of categories using a model. Each of the categories corresponds to a region having a same material on the surface of the semiconductor chip. A surface height offset between a surface baseline and at least one of the categories is determined by the at least one processor based, at least in part, on a calibration signal associated with the region corresponding to the at least one of the categories. The surface topography of the semiconductor chip is characterized by the at least one processor based, at least in part, on the surface height offset and the interference signals.

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Wuhan, China

Sicong Wang