Taiwan Semiconductor Manufacturing Comp. Ltd.

Shun-Hsiang Chen

Ming-Chih Chung

Hon-Shung Lui

Shih-Ming Wang

Tingray Chien

The present invention provides a wafer pedestal for holding a semiconductor wafer that includes a pedestal body of essentially a metal disc and at least three insulating spacers that are situated on a top surface of the pedestal body for supporting and insulating a silicon wafer on and from the pedestal body. A wafer may be suitably supported by the insulating plugs such that no concentrated electric field will form on the wafer surface at or near the insulating plugs to cause arcing and furthermore, the wafer is supported sufficiently away from the pedestal body such that any subsequent film depositions does not adhere the wafer to the pedestal body.

Insulated wafer pedestal

An improved method of forming a tunnel-free tungsten plug is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer of borophospho-tetraethoxysilane (BP-TEOS) is deposited overlying the semiconductor device structures. Contact openings are etched through the insulating layer to the underlying semiconductor device structures wherein a tunnel opens in the insulating layer between contact openings. The semiconductor substrate is covered with a first barrier metal layer. The semiconductor substrate is coated with a spin-on-glass layer wherein the contact openings and the tunnel are filled with the spin-on-glass. The spin-on-glass is anisotropically etched away whereby the spin-on-glass remains only within the tunnel. The semiconductor substrate is covered with a second barrier metal layer. The contact openings are filled with tungsten which is etched back to form tungsten plugs within the contact openings wherein the filled tunnel provides tunnel-free tungsten plugs in the fabrication of the integrated circuit device.

Tungsten tunnel-free process

A method of forming a tunnel-free tungsten plug is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer of borophospho-tetraethoxysilane (BP-TEOS) is deposited overlying the semiconductor device structures. Contact openings are etched through the insulating layer to the underlying semiconductor device structures wherein a tunnel opens in the insulating layer between contact openings. The semiconductor substrate is covered with a first barrier metal layer. The semiconductor substrate is coated with a spin-on-glass layer wherein the contact openings and the tunnel are filled with the spin-on-glass. The spin-on-glass is anisotropically etched away whereby the spin-on-glass remains only within the tunnel. The semiconductor substrate is covered with a second barrier metal layer. The contact openings are filled with tungsten which is etched back to form tungsten plugs within the contact openings wherein the filled tunnel provides tunnel-free tungsten plugs in the fabrication of the integrated circuit device.

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Hsin Chu, Taiwan

Shun-Hsiang Chen