United Integrated Circuits Corp.

Shu-Ying Lu

Chang-Ming Lu

Jau-Hone Lu

Ya-Ling Hung

The invention provides a structure of a bonding pad, which comprising: a substrate; a dielectric layer formed over the substrate; a first metal layer formed in the dielectric layer; a second metal layer formed in the dielectric layer and above the first metal layer; a plurality of first plugs formed between the first metal layer and the second metal layer, wherein the plugs are used for connecting the first metal layer with the second metal layer; a third metal layer formed over the dielectric layer; and a plurality of second plugs, formed between the second metal layer and the third metal layer, wherein the second plugs are used for connecting the second metal layer with the third metal layer.

Structure of a bonding pad for semiconductor devices

A method for fabricating a mixed-mode device. A first gate oxide layer and a second gate oxide layer are formed. The polysilicon layer is used as a mask to pattern the gate oxide layers. Additionally, a top electrode is formed during the first gate oxide layer is patterned. A bottom electrode is formed during the second gate oxide layer is patterned. The first gate oxide layer and the second gate oxide layer are formed by a single oxidation operation, thus thicknesses of the first gate oxide layer and the second oxide layer can be effectively controlled.

Growing community of inventors

Hsinchu Hsien, Taiwan

Shu-Ying Lu