United Microelectronics Corp.

Fujian Jinhua Integrated Circuit Co., Ltd.

Other

Shu-Yen Chan

Tien-Chen Chan

Chin-Cheng Chien

Tsuo-Wen Lu

Ger-Pin Lin

Shih-Fang Tzou

Ying-Wei Yen

Ting-Pang Chung

Chun-Yuan Wu

Ted Ming-Lang Guo

Chan-Lon Yang

Yu-Shu Lin

Yun-Ren Wang

Yu-Ren Wang

Chi-Mao Hsu

Kuo-Tai Huang

Chin-I Liao

YI-Fan Li

Jei-Ming Chen

Chia-Wei Wu

Ming-Hua Chang

Chun-Wei Hsu

Po-Han Wu

Shih-Han Hung

Yu-Min Lin

Luo-Hsin Lee

Feng-Yi Chang

Fu-Che Lee

Chien-Liang Lin

Chia-Lung Chang

Yen-Hsing Chen

Ling-Chun Chou

Ching-I Li

Tsai-Fu Hsiao

Chung-Ting Huang

Chun-Yu Chen

Tsung-Hung Chang

Tzung-Ying Lee

Kuan-Chun Lin

Zih-Hsuan Huang

Shih-Kuei Yen

Shyh-Fann Ting

Li-Wei Feng

Cheng-Tung Huang

Meng-Yi Wu

Tzyy-Ming Cheng

Wen-Han Hung

Kun-Hsien Lee

Neng-Hui Yang

Li-Shian Jeng

Shao-Wei Wang

Wen-Yi Teng

Yi-Ching Wu

Chih-Chung Chen

I-Cheng Hu

Tien-I Wu

Chen-Kuo Chiang

Chin-Wei Wu

Yung-Ming Wang

Hsin-Huei Wu

Chien-Hua Lung

Tzu-Feng Kuo

Chung-Yih Chen

Ching-Hong Jiang

Wu-Chun Kao

Ying-Hsuan Li

A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Semiconductor device

A semiconductor device includes a substrate having at least a trench formed therein. A conductive material fills a lower portion of the trench. A barrier layer is between the conductive material and the substrate. An insulating layer is in the trench and completely covers the conductive material and the barrier layer, wherein a portion of the insulating layer covering the barrier layer has a bird's peak profile.

Semiconductor device and method of forming the same

A semiconductor device includes a semiconductor substrate having a gate trench including of an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Method for forming semiconductor device having a multi-thickness gate trench dielectric layer

A semiconductor device and a method of forming the same are disclosed. First, a substrate having a main surface is provided. At least a trench is formed in the substrate. A barrier layer is formed in the trench and a conductive material is formed on the barrier layer and filling up the trench. The barrier layer and the conductive material are then recessed to be lower than the upper surface of the substrate. After that, an oxidation process is performed to oxidize the barrier layer and the conductive material thereby forming an insulating layer.

The present invention provides a semiconductor structure, the semiconductor structure includes a substrate, at least one active area is defined on the substrate, a buried word line is disposed in the substrate, a source/drain region disposed beside the buried word line, a diffusion barrier region, disposed at the top of the source/drain region, the diffusion barrier region comprises a plurality of doping atoms selected from the group consisting of carbon atoms, nitrogen atoms, germanium atoms, oxygen atoms, helium atoms and xenon atoms, a dielectric layer disposed on the substrate, and a contact structure disposed in the dielectric layer, and electrically connected to the source/drain region.

Semiconductor structure with diffusion barrier region and manufacturing method thereof

A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.

Buried word line structure and method of making the same

A semiconductor device includes a semiconductor substrate having a gate trench including an upper trench and a lower trench. The upper trench is wider than the lower trench. A gate is embedded in the gate trench. The gate includes an upper portion and a lower portion. A first gate dielectric layer is between the upper portion and a sidewall of the upper trench. The first gate dielectric layer has a first thickness. A second gate dielectric layer is between the lower portion and a sidewall of the lower trench and between the lower portion and a bottom surface of the lower trench. The second gate dielectric layer has a second thickness that is smaller than the first thickness.

Semiconductor device having a multi-thickness gate trench dielectric layer

A method of manufacturing a semiconductor device is provided, which includes the steps of providing a capacitor structure, forming a conductive layer on the capacitor structure, performing a hydrogen doping process to the conductive layer, forming a metal layer on the conductive layer after the hydrogen doping process, and patterning the metal layer and the conductive layer to forma top electrode plate.

Method of manufacturing a semiconductor device

A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region defined thereon; forming a trench in the substrate; performing a first ion implantation process to form a first doped region having a first conductive type in the substrate adjacent to the trench; forming a gate electrode in the trench; and performing a second ion implantation process to form a second doped region having a second conductive type in the substrate above the gate electrode.

Method for fabricating semiconductor device

A semiconductor device includes a semiconductor substrate having a gate trench penetrating through an active area and a trench isolation region surrounding the active area. The gate trench exposes a sidewall of the active area and a sidewall of the trench isolation region. The sidewall of the trench isolation region includes a void. A first gate dielectric layer conformally covers the sidewall of the active area and the sidewall of the trench isolation region. The void in the sidewall of the trench isolation region is filled with the first gate dielectric layer. A second gate dielectric layer is grown on the sidewall of the active area. A gate is embedded in the gate trench.

Semiconductor device and fabrication method thereof

A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.

Semiconductor device having reverse U-shaped epitaxial layer and method for fabricating the same

A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.

Semiconductor device having silicon-germanium layer on fin and method for manufacturing the same

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Changhua County, Taiwan

Shu-Yen Chan