Nippondenso Co., Ltd.

Shoji Toyoshima

Masami Yamaoka

Yukio Tsuzuki

Fumio Ohara

Hiroshi Ohtsuki

A semiconductor device includes a diode element for protecting a transistor against an overvoltage. A first region of p-type conductivity is formed on an upper surface of an n-type semiconductor substrate in which base and emitter regions of the transistor are formed. A second region of n.sup.+ -type conductivity whose impurity concentration is higher than that of the n-type semiconductor substrate is formed on its upper surface to be spaced apart from the first region. An insulating film is formed to cover the upper surface of the semiconductor substrate. Furthermore, a conductive film is formed to partially overlap the first and second regions through the insulating film. The first region serves as an anode, the second region serves as a cathode, and the conductive film serves as a gate electrode; thus an overvoltage protection diode is obtained.

Semiconductor device including overvoltage protection diode

A device protecting film having a UV transmissible SiN film, wherein the film is formed by a plasma CVD process in such a manner that a composition ratio Si/N falls within the range of 0.75 to 0.87, a Si--H bond concentration Z (cm.sup.-3) in the SiN film has a value near the value Z expressed by the following formula in accordance with a value X of Si/N:

Device protecting layer

This application describes a semiconductor device having a power amplifier pattern consisting of a plurality of parallel-connected transistor unit cells with emitters thereof being arrayed like meshes, wherein the width of the emitter of each transistor unit cell is not in excess of 50 microns. The limitation of the emitter width contributes to enhancement of the reverse-bias breakdown endurance.

Semiconductor device

In a semiconductor circuit device having a diode as an overvoltage protection element, a semiconductor substrate is comprised of an N-type collector substrate integral with a transistor. An N.sup.+ type collector diffusion layer is formed on the rear surface of the substrate. A P-type anode region and a N.sup.+ cathode region are formed in the major surface of the substrate so that they are spaced apart from each other and the N.sup.+ cathode region has the same type of impurity, but at a higher impurity concentration level than, the semiconductor substrate. An insulating film is formed on the surface of the resultant structure. A gate electrode is formed in an overlapping relation to the anode region and cathode region with an insulating film therebetween. A gate potential is established between the gate electrode and the underlying substrate.

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Kohnan, Japan

Shoji Toyoshima