Nuvoton Technology Corporation Japan

Asada Iron Works Co., Ltd.

Shinya Oda

Yoshihiro Matsushima

Takeshi Harada

Yoshihiko Kawakami

Akihiko Matsumoto

Ippei Muneoka

A semiconductor device that is a chip-size-package-type semiconductor device that is facedown mountable includes: a semiconductor layer including a semiconductor substrate and a low-concentration impurity layer in contact with an upper surface of the semiconductor substrate; a metal layer having a thickness of at least 10 μm; a first vertical MOS transistor in the semiconductor layer; and a second vertical MOS transistor in the semiconductor layer. A side surface of the metal layer includes roughness forming vertical stripes in a direction perpendicular to the metal layer, and has a maximum height of profile greater than 1.0 μm. In a plan view of the semiconductor device, an area occupancy of a formation containing metal in the metal layer is at most 5% in a 10-μm square region located at least 13 μm inward from an outer edge of the semiconductor device, within an upper surface of the semiconductor device.

Semiconductor device and chip singulation method

A semiconductor device that is a chip-size-package-type semiconductor device that is facedown mountable includes: a semiconductor layer including a semiconductor substrate and a low-concentration impurity layer in contact with an upper surface of the semiconductor substrate; a metal layer having a thickness of at least 10 &#x3bc;m; a first vertical MOS transistor in the semiconductor layer; and a second vertical MOS transistor in the semiconductor layer. A side surface of the metal layer includes roughness forming vertical stripes in a direction perpendicular to the metal layer, and has a maximum height of profile greater than 1.0 &#x3bc;m. In a plan view of the semiconductor device, an area occupancy of a formation containing metal in the metal layer is at most 5% in a 10-&#x3bc;m square region located at least 13 &#x3bc;m inward from an outer edge of the semiconductor device, within an upper surface of the semiconductor device.

The present invention can suppress variations in dispersion and grinding processing, apply stable shearing force to a material to be processed, and also enable efficient dispersion and grinding. The present invention has a supply portion (A), a processing portion (B), and a discharge portion (C). The processing portion (B) includes a stator (), and a rotor (). The material to be processed is processed in a gap (Gt) between an outer peripheral surface of the rotor () and an inner peripheral surface of the stator (). The inner peripheral surface of the stator () and the outer peripheral surface of the rotor () are circular in a cross section orthogonally intersecting the axis of the rotor () and linear in a cross section bearing the axis. The gap (Gt) is constant in the circumferential direction and the axial direction.

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Osaka, Japan

Shinya Oda