National Institute of Advanced Industrial Science and Technology

Kabushiki Kaisha Toshiba

Japan Science and Technology Agency

Tohoku University

Canon Anelva Corporation

Godo Kaisha IP Bridge 1

Other

National Institute for Materials Science

Canaon Anelva Corporation

Shinji Yuasa

Akio Fukushima

Hitoshi Kubota

Koji Ando

Kay Yakushiji

Taro Nagahama

Hiroaki Yoda

Tadashi Kai

Eiji Kitagawa

Tadaomi Daibou

Takayuki Nozaki

Minoru Amano

Toshihiko Nagase

Yoshishige Suzuki

Hiroshi Imamura

Naoharu Shimomura

Katsuya Nishiyama

Makoto Nagamine

Masahiko Nakayama

Junichi Ito

Hiroki Maehara

Shigemi Mizukami

Terunobu Miyazaki

Takahide Kubota

Rie Matsumoto

Naoki Watanabe

Masatoshi Yoshikawa

Koji Ueda

Shinji Yamagata

Daisuke Saida

Koji Tsunekawa

David Djulianto Djayaprawira

Motonobu Nagai

Vadym Zayets

Yoichi Shiota

Hidekazu Saito

Kei Yakushiji

Hiroko Arai

Tatsuya Kishi

Hiroki Noguchi

Kazutaka Ikegami

Sumio Ikegawa

Hisanori Aikawa

Kazuhiro Hono

Toshihiko Sato

Yutaka Hashimoto

Takao Ochiai

Tadakatsu Ohkubo

Yoshinori Nagamine

Masaru Tokou

Masafumi Shirai

Shingo Tamaru

Xiandong Xu

Rachwal Anna Koziol

Masahito Tsujikawa

Makoto Konoto

Takurou Ikeura

Ashwin Tulapurkar

Naokion Watanabe

The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Method of manufacturing a magnetoresistive random access memory (MRAM)

A method of manufacturing a magnetoresistive random access memory (MRAM). The method includes forming a first CoFeB layer of the MTJ devices, the first CoFeB layer being amorphous and forming a magnesium oxide (MgO) layer of the MTJ devices over the first CoFeB layer. Further, there is a forming of a second CoFeB layer of the MTJ devices, the second CoFeB layer being amorphous over the MgO layer, and annealing the MTJ devices. The first and second CoFeB layers are crystallized by the annealing, and the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented.

Method of manufacturing a magnetorestive random access memeory (MRAM)

According to one embodiment, a magnetic element includes a first layer and a second layer. The first layer includes a first element and a second element. The first element includes at least one selected from the group consisting of Fe, Co, and Ni. The second element includes at least one selected from the group consisting of Ir and Os. The second layer is nonmagnetic.

Magnetic element, magnetic memory device, and magnetic sensor

According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 &#x3a9;&#x3bc;m. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation. The write pulse includes a rise period, a potential of the write pulse changing from a first potential toward a second potential in the rise period, an intermediate period of the second potential after the rise period, and a fall period after the intermediate period, the potential of the write pulse changing from the second potential toward the first potential in the fall period. A duration of the fall period is longer than a duration of the rise period.

Magnetic memory device and method for controlling a write pulse

A magnetic element includes a first magnetic layer and a first nonmagnetic layer. An angle &#x3b8;between a first direction and the magnetization direction of the first magnetic layer satisfies 0&#xb0;&#x3c;&#x3b8;&#x3c;90&#xb0; or 90&#xb0;&#x3c;&#x3b8;&#x3c;180&#xb0; in a state in which neither a voltage nor a magnetic field is substantially applied to the first magnetic layer; and the first direction is from the first nonmagnetic layer toward the first magnetic layer. A resistance&#xb7;area of the first nonmagnetic layer is 10 &#x3a9;&#x3bc;mor more.

Magnetic element

Magnetic tunnel junction device

A high-frequency phase-locked oscillation circuit having an extremely narrow peak width and a stable frequency so that a high-frequency wave that is oscillated by the MR element solves a problem of a large peak width of oscillation spectrum. The high-frequency phase-locked oscillation circuit includes a magnetoresistive element that oscillates a high-frequency wave with an oscillating frequency; a reference signal source that outputs a reference signal with a reference frequency; a phase-locked loop circuit having a phase comparator, a loop filter, and a frequency divider; an adder that adds a phase error signal output from the loop filter and a bias voltage for oscillating the high-frequency wave from the magnetoresistive element, and that inputs an added bias voltage to the magnetoresistive element; and a filter provided between the frequency divider and the magnetoresistive element.

High-frequency phase-locked oscillation circuit

A resistance change type memory includes a variable resistance element connected between first and second bit lines and a write control circuit including first and second transistors each including a terminal connected to the first bit line. The write control circuit controls write to the variable resistance element. The write control circuit supplies a second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying a first voltage to the first bit line via the first transistor.

Resistance change type memory including write control circuit to control write to variable resistance element

Some embodiments are directed to a non-collinear magnetoresistive device, including a free layer; a fixed layer; and a non-magnetic layer disposed between the free layer and the fixed layer, wherein the fixed layer has an easy magnetization direction in an in-plane direction or in a perpendicular direction, the free layer satisfies at room temperature expressions (1) and (2) below:&#x2265;1.66&#xd7;10&#x2003;&#x2003;(1)&#x2264;5&#xd7;10nm&#x2003;&#x2003;(2)where E=(K+K+K/4K)&#xd7;V, K: an effective first-order anisotropy constant, K: a second-order anisotropy constant, and V: a volume, and wherein the free layer is in a cone magnetization state.

Non-collinear magnetoresistive device

Some embodiments are directed to a magnetoresistive device, including a free layer having an easy magnetization direction in a perpendicular direction or in an in-plane direction; a fixed layer having the easy magnetization direction which is in the perpendicular direction when the easy magnetization direction of the free layer is in the perpendicular direction or in the in-plane direction when the easy magnetization direction of the free layer is in the in-plane direction; and a non-magnetic layer disposed between the free layer and the fixed layer.

Magnetoresistive device

A magnetic memory according to an embodiment includes at least one MTJ element, the MTJ element including: a magnetic multilayer structure including a first magnetic layer in which a direction of magnetization is fixed, a second magnetic layer in which a direction of magnetization is changeable, and a tunnel barrier layer located between the first and second magnetic layers; a first electrode provided on a first surface of the magnetic multilayer structure; a second electrode provided on a second surface of the magnetic multilayer structure; an insulating film provided on a side surface of the magnetic multilayer structure; and a control electrode provided on the side surface of the magnetic multilayer structure with the insulating film located therebetween, a voltage being applied to the control electrode in a read operation, which increases an energy barrier for changing the magnetization of the second magnetic layer.

Magnetic memory

According to one embodiment, a magnetoresistive element includes a first magnetic layer having a variable magnetization direction; a second magnetic layer having an invariable magnetization direction; and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer and including an MgFeO film, wherein the MgFeO film contains at least one element selected from a group consisting of Ti, V, Mn, and Cu.

Magnetoresistive element and magnetic memory

Growing community of inventors

Tsukuba, Japan

Shinji Yuasa