United Silicon Incorporated

Shih-Ming Lan

Hsien-Liang Meng

Chun-Liang Liu

Ho-Sung Liao

Andrew Lin

A method for manufacturing a shallow trench isolation. A substrate is provided, wherein the substrate has a pad oxide on the substrate and a silicon nitride layer on the pad oxide layer, and a trench penetrates through the silicon oxide layer and the pad oxide layer and into the substrate. A first oxide layer is conformally formed on the silicon nitride layer and in the trench. A rapid thermal process is performed. A second oxide layer is formed on the oxide layer to fill the trench. Portions of the first and the second oxide layers are removed to expose the silicon nitride layer.

Method of manufacturing shallow trench isolation

A method for forming an insulating layer to solve a problem of non-uniform thickness of the insulating layer is provided. The method includes forming a first insulating layer over a substrate preferably by chemical vapor deposition (CVD) at an operation temperature of about 200&deg; C.-350&deg; C. The thickness of the first insulating layer is about 500 &angst;-5000 &angst;. A second insulating layer is formed over the first insulating layer preferably by CVD at a temperature of about 350&deg; C.-500&deg; C. The thickness of the second insulating layer is about 1000 &angst;-10000 &angst;. The first and the second insulating layers form together as an insulating layer to insulate transistors and isolation structures from the interconnect metal layer.

Method for forming an insulating film

A method of forming interconnections is provided. A defined metal layer is formed as a metal line on a provided substrate. An oxide layer is formed on the metal layer and on the substrate. A silicon nitride layer is formed on the oxide layer. The oxide layer and the silicon nitride layer constitute a seed layer. A via hole is formed in the silicon nitride layer to expose the oxide layer positioned over the metal layer. A dielectric layer is formed on the seed layer. Since the silicon nitride layer and the oxide layer are different, a part of the dielectric layer positioned on the silicon nitride layer is a silicon oxide layer having holes therein. The other dielectric layer positioned on the oxide layer within the via hole is a dense silicon oxide layer.

Method of forming interconnections

A method for fabricating a dual damascene structure is provided. The method contains providing a substrate, which has a patterned metal layer on it. A first liner oxide layer, a first seed layer are sequentially formed over the substrate. The first seed layer is patterned to form a first opening above the patterned metal layer to expose the first liner oxide layer. A first dielectric layer is formed over the substrate. The first dielectric layer includes a first porous dielectric layer on the first seed layer, and a first normal dielectric layer on the exposed portion of the first liner oxide layer. A first cap layer is formed over the first dielectric layer, and is planarized. An etching stop layer with a second opening above the first opening to expose the first cap layer is formed on the first cap layer. With the same formation mechanism, a second liner oxide layer, a second seed layer with a third opening above the second opening, a second porous dielectric layer, a second cap layer are formed over the substrate. A mask layer is formed over the second cap layer. Patterning the above layers forms a damascene opening in the first normal dielectric layer and the second normal dielectric layer. Filling the dual damascene opening with metallic material forms a dual damascene structure.

Method of fabricating a dual damascene structure

A method of removing a copper oxide layer within a via hole. A copper layer is formed. A dielectric layer is formed on the copper layer. A via hole is formed to penetrate through the dielectric layer and expose a part of the copper layer within the via hole. The exposed copper layer reacts with oxygen in air to form a copper oxide layer. Using 1,1,1,5,5,5-hexafluoro-2,4-pentanedione, the copper oxide layer is removed.

Method of removing copper oxide within via hole

A method of fabricating a shallow trench isolation. On a substrate comprising a pad oxide layer and a mask layer on the pad oxide layer, a trench which penetrates through the mask layer, the pad oxide layer, and a part of the substrate is formed. A part of the mask layer is removed to form an opening on top of the trench, wherein the opening is wider than the trench. An insulation layer is formed on the mask layer to fill the opening and the trench. The insulation layer is etched until the mask layer is exposed. The mask layer is removed, so that a T-shape insulation plug is formed. The insulation plug and the pad oxide layer are etched until the insulation plug and the substrate are at a same level.

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Hsinchu, Taiwan

Shih-Ming Lan