United Semiconductor Corp.

United Microelectronics Corp.

Shih-Ching Chen

Anchor Chen

Edward Houn

Chung-Po Hsu

Guan-Jiun Liu

Chi-Jui Sung

Neng-Hsing Shen

A method of coating an amorphous silicon layer. An amorphous silicon layer is directly deposited on the polysilicon nodes by a self-aligned method. A chemical mechanical polishing process is performed to control the thickness of the amorphous silicon layer. No additional photoresist is used during the whole processes. Therefore, the duration for deposition can be reduced and the quality of the amorphous silicon film is improved.

Method of coating amorphous silicon film

This invention provides a concave shallow trench isolation structure, and a fabricating method of a shallow trench isolation structure with concave bottom corners. The concave shape of the structure prevents stress centralization, and avoids leakage current or punch through in the source/drain regions.

Method of forming a shallow trench isolation structure

A method of fabricating a bottom electrode of a capacitor, in which a semiconductor substrate is provided wherein a transistor is formed thereon and the transistor contains a source/drain region. A dielectric layer having a contact hole is formed over the substrate wherein a portion of the source/drain region is exposed by the contact hole. A doped polysilicon layer is formed over the substrate. An insulating layer is formed on the doped polysilicon layer. An amorphous silicon layer is formed on the insulating layer. The amorphous silicon layer, the insulating layer and the doped polysilicon layer are defined to form a main structure of the bottom electrode. Amorphous silicon spacers are formed on sidewalls of the main structure. A hemispherical grained silicon layer is formed on the amorphous silicon layer and the amorphous silicon spacers.

Method for bottom electrode of capacitor

A method for forming hemispherical silicon grains on selected surfaces of a silicon layer includes the steps of forming a doped polysilicon layer over a substrate, and then forming amorphous spacers on the sidewalls of the doped polysilicon layer. Thereafter, an ion implantation is carried out to transform the upper portion of the doped polysilicon into an amorphous silicon layer. Finally, hemispherical silicon grains are formed on the upper surface of the amorphous layer lying above the polysilicon layer and the exposed surface of the amorphous spacers.

Method for forming hemispherical silicon grains on designated areas of silicon layer

A method is described for forming a hemispherical grained silicon structure. A patterned amorphous silicon layer is formed over a wafer. The amorphous silicon layer is etched by an etching step with a mixed solution including a hydrofluoric solution and an oxidizing agent. A cleaning step is performed with the hydrofluoric solution. An annealing step is performed to form the hemispherical grained silicon structure.

Method for forming hemispherical grained silicon structure

A method of forming a layer of hemispherical grain polysilicon over the lower electrode of a capacitor. The method comprises the steps of providing a substrate that has a field effect transistor already formed thereon, and then forming an insulating layer with a contact opening over the substrate. Subsequently, a polysilicon layer is formed over the insulating layer that completely fills the contact opening. This polysilicon layer is electrically coupled to one of the source/drain regions of the field effect transistor. Thereafter, a thin buffer layer is formed over the polysilicon layer, and then the thin buffer layer is patterned. The thin buffer layer is used as a mask for covering the polysilicon layer that is to be part of the lower electrode of a capacitor. Next, a plasma etching operation is carried out to remove the thin buffer layer and a portion of the polysilicon layer at the same time. Finally, a heat treatment is carried out to form a hemispherical grain polysilicon layer over the surface of the lower electrode.

Method of forming hemispherical grain polysilicon over lower electrode

In a process of fabricating an integrated circuit, a method for uniformly depositing silicon nitride by disposing a plurality of dummy discs beside the production wafers. The dummy discs are made of quartz or silicon carbide. Since the dummy discs can be used longer before been recycled, plenty dummy discs can be saved from disuse. Furthermore, the cost of the management and treatment of the dummy discs is great reduced in this way.

Growing community of inventors

Nantou Hsien, Taiwan

Shih-Ching Chen