Fuji Electric Co., Ltd.

Shigeyuki Obinata

Tatsuhiko Fujihira

Yukio Yano

Naoki Kumagai

Masahito Otsuki

Tomoyuki Yamazaki

Seiji Momota

A high voltage integrated circuit is provided that includes a first region of first conductivity type; a second region of second conductivity type formed in a first major surface of the first region; a third region of first conductivity type formed in a selected area of a surface of the second region; first source region and first drain region of the first conductivity type formed in the second region, apart from the third region; a first gate electrode formed on a surface of the second region between the first source region and first drain region, through an insulating film; second source region and second drain region of second conductivity type formed in a surface of the third region; and a second gate electrode formed on a surface of the third region between the second source region and the second drain region, through an insulating film.

High voltage integrated circuit, high voltage junction terminating structure, and high voltage MIS transistor

High voltage integrated circuit, high voltage junction terminating

Mutual interference is reduced between a main cell portion and a sensing cell portion for detecting the current flowing through the main cell portion of a vertical MOS semiconductor device, and accuracy and reliability of overcurrent detection are improved. In the device, well regions of (p) type are formed between the main and sensing cell portions for capturing the minority carriers. Breakdown of the gate oxide film caused by an open emitter electrode of the sensing cell portion is prevented by forming the (p) type well regions with ring shapes, by spacing the (p) type well regions by 5 to 20 .mu.m, and by adjusting the isolation withstand voltage between the main and sensing cell portions below the withstand voltage of the gate oxide film. A voltage spike is minimized by narrowing the overlap of the detecting and gate electrodes for reduced capacitance between these electrodes.

Vertical MOS semiconductor device

For stabilized overcurrent protection, an insulated-gate type bipolar transistor (IGBT) is provided with an overcurrent limiting feature having reduced dependence of the limited-current value on the power supply voltage. Sensing cells 9 for current detection are formed on part of a semiconductor substrate 5 on which a large number of IGBT main cells 6 are formed integratedly. Emitter electrodes 10 of the sensing cells are connected to an external overcurrent-protection circuit for current detection and overcurrent protection. The sensing cells and the main cells are electrically separated. P-wells 11 for drawing out hole current, connected to the emitter electrodes of the main cells, are formed in a region along the circumference of the sensing cells so that interference between the carriers of the main cells and those of the sensing cells is suppressed and current ratio is stabilized.

Insulated-gate type bipolar transistor

An insulated-gate bipolar transistor is formed of a number of cells integrally formed on a semiconductor substrate. The cells includes main cells with emitter electrodes, and current detection sensing cells situated adjacent to the main cells. Emitter electrodes are formed in an area of the sensing cells to be separated from the emitter electrodes of the main cells, and an overcurrent protection circuit is connected to the emitter electrodes of the sensing cells. When shorting accident occurs, an overcurrent protecting operation is performed such that an overcurrent is accurately detected through the sensing cells and a main current flowing through the main cells is made smaller than a short-circuit withstanding capacity of the IGBT by gate control of the protection circuit.

Insulated-gate bipolar transistor

A MOS semiconductor device is disclosed for monitoring the value of the current flowing through an element by outputting a sense signal. The semiconductor has a main unit element and a sense unit element formed in a semiconductor layer, and the current flowing through the sense unit element is proportional to the current flowing through the main unit element. Both the main unit element and the sense unit element have a base region, a source region, a gate electrode, and a source electrode. A doped region of the same conductivity type as the base regions is formed in the semiconductor layer between the base regions of the main unit element and the sense unit element. This doped region is in contact with the source electrode of the main unit element. This structure decreases the power loss due to the sense signal current and ensures a linear relationship between the sense signal current and the main current.

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Nagano, Japan

Shigeyuki Obinata