Mitsubishi Denki Kabushiki Kaisha

Samsung Electronics Co., Ltd.

Renesas Technology Corp.

Ryoden Semiconductor System Engineering Corporation

Other

Shigenobu Maeda

Toshiaki Iwamatsu

Shigeto Maegawa

Takashi Ipposhi

Yasuo Yamaguchi

Takuji Matsumoto

Yuuichi Hirano

Hirotada Kuriyama

Yasuo Inoue

Hyun-Min Choi

Shoichi Miyamoto

Shuichi Ueno

Jeong Hwan Yang

Sang-Pil Sim

Tatsuya Kunikiyo

Akihiko Furukawa

Hee-Soo Kang

Soo-Hun Hong

Hidenobu Fukutome

Hisayuki Nishimura

Kyozo Kanamoto

Satoshi Shimizu

Yoshinori Okumura

Seunghan Seo

Kazuhito Tsutsumi

Young-Moon Choi

Do-Sun Lee

Yuichi Hirano

Yeohyun Sung

Junga Choi

Sang-Su Kim

Yoshiyuki Ishigaki

Mirco Cantoro

Sangsu Kim

Young-Gun Ko

Jeong Suong Yang

Toshiaki Tsutsumi

Motomu Ukita

Krishna Bhuwalka

Toshihide Oka

Joo-Hyun Jeong

Jihoon Yoon

Ji-hoon Yoon

Zhenhua Wu

Choong-Ho Lee

Hyunwoo Kim

Kazuya Yamamoto

Jae-Ho Lee

Dong-Woo Kim

Sang-Jin Hyun

Hirokazu Sayama

Tadaharu Minato

Kazuyuki Sugahara

Chul-Sung Kim

Seung-hwan Lee

Kazunobu Ota

Heon-jong Shin

Seog-Heon Ham

Mikio Tsujiuchi

Katsumi Eikyu

Hiroshi Komurasaki

Hyun-pil Noh

Eunsung Kim

Bo-Ram Kim

Tsukasa Matsuda

Jeong-hwan Yang

Hyo-Seok Choi

Shiyong Yi

Jeong Ju Park

Jong-Hyuk Lee

Min-Joo Kim

Tadashi Nishimura

Keun Hwi Cho

Ha-Young Kim

David Seo

Sung Chul Park

Heonjong Shin

Hiroki Honda

Juyoun Kim

Changhwa Kim

Sung-Bong Kim

Jae-Hwan Lee

Chang-Wook Moon

Taeyong Kwon

Dong-hun Lee

Chul Hong Park

Yoshiki Wada

Hyung-Soon Jang

Young-Wug Kim

Keun-Hwi Cho

Tae-yong Kwon

Jeong-Hwan Yang

Myung-gil Kang

Bin Liu

Chang-woo Noh

Sung Min Kang

Mun Hyeon Kim

Dong-Il Park

Han Su Oh

Youngmoon Choi

A semiconductor device is provided and includes a substrate and a stack on the substrate. The stack includes plural active layers that are vertically stacked and spaced apart from each other, and plural gate electrodes that are on the active layers, respectively, and vertically stacked. Each active layer includes a channel layer under a corresponding one of the gate electrodes, and a source/drain layer disposed at a side of the channel layer and electrically connected to the channel layer. The channel layer is made of a two-dimensional atomic layer of a first material.

Semiconductor device having stacked structure with two-dimensional atomic layer

A display driver integrated circuit (IC) is provided. The display driver IC includes a shift register configured to output a digital signal, and a digital-analog converter configured to receive the digital signal and generate a data voltage corresponding to the digital signal, wherein the digital-analog converter includes a delta-sigma modulator configured to output a modulated signal by receiving the digital signal and a first voltage, and performing delta-sigma modulation on the digital signal using the first voltage, and a level shifter configured to receive the modulated signal and a second voltage higher than the first voltage, and amplify the modulated signal using the second voltage.

Display driver IC for low voltage signal conversion and electronic device comprising the same

A semiconductor device, a field effect transistor, and a fin field effect transistor are provided. The semiconductor device may include a channel layer, a source/drain layer, and a gate electrode. The channel layer is provided on a substrate and extends in a direction perpendicular to a top surface of the substrate. The source/drain layer is disposed at a side of the channel layer and is electrically connected to the channel layer. The gate electrode is provided adjacent to at least one of surfaces of the channel layer. The channel layer includes a two-dimensional atomic layer made of a first material.

Field effect transistor with channel layer with atomic layer, and semiconductor device including the same

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

Semiconductor devices including field effect transistors and methods of forming the same

A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.

Semiconductor devices including protruding insulation portions between active fins

A method includes forming mask patterns spaced apart from each other by at least one opening on an etch target layer, filling the opening with a block copolymer material including first and second polymer blocks of different properties, and annealing the block copolymer material to form first patterns and second patterns, the first patterns in contact with facing sidewalls of adjacent ones of the mask patterns, respectively, and at least one of the second patterns between the first patterns. The first patterns include the first polymer blocks and the second patterns include the second polymer blocks.

Method of fabricating pattern structure

A semiconductor device includes first to fourth cells sequentially disposed on a substrate, first to third diffusion break structures, a first fin structure configured to protrude from the substrate, the first fin structure comprising first to fourth fins separated from each other by the first to third diffusion break structures, a second fin structure configured to protrude from the substrate, to be spaced apart from the first fin structure, the second fin structure comprising fifth to eighth fins separated from each other by the first to third diffusion break structures, the first to fourth gate electrodes being disposed in the first to fourth cells, respectively, and the number of fins in one cell of the first to fourth cells is different from the number of fins in an other cell of the first to fourth cells.

Semiconductor device

Field effect transistor with channel layer, and semiconductor device including the same

Methods of forming a semiconductor device may include forming a fin-type active pattern that extends in a first direction on a substrate, the fin-type active pattern including a lower pattern on the substrate and an upper pattern on the lower pattern. A field insulating layer is formed on the substrate, the sidewalls of the fin-type active pattern, and a portion upper pattern protruding further away from the substrate than a top surface of the field insulating layer. A dummy gate pattern that intersects the fin-type active pattern and that extends in a second direction that is different from the first direction is formed. The methods include forming dummy gate spacers on side walls of the dummy gate pattern, forming recesses in the fin-type active pattern on both sides of the dummy gate pattern and forming source and drain regions on both sides of the dummy gate pattern.

Methods of fabricating semiconductor devices

Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes an isolation layer defining active portions of the substrate that are spaced apart from each other in a direction. The semiconductor device includes an epitaxial layer on the active portions. The semiconductor device includes a metal silicide layer on the epitaxial layer. Moreover, the semiconductor device includes a contact structure that only partially overlaps the metal silicide layer on the epitaxial layer. Related methods of forming semiconductor devices are also provided.

Semiconductor devices including contact structures that partially overlap silicide layers

Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

Semiconductor devices including active fins and methods of manufacturing the same

Disclosed are CMOS device and CMOS inverter. The CMOS device includes a substrate having active lines extending in a first direction and defined by a device isolation layer, the substrate being divided into an NMOS area, a PMOS area and a boundary area interposed between the NMOS and the PMOS areas and having the device isolation layer without the active line, a gate line extending in a second direction across the active lines and having a first gate structure on the active line in the first area, a second gate structure on the active line in the second and a third gate structure on the device isolation layer in the third area. The electrical resistance and parasitic capacitance of the third gate structure are smaller than those of the NMOS and the PMOS gate structures. Accordingly, better AC and DC performance of the CMOS device can be obtained.

Semiconductor devices and inverter having the same

Growing community of inventors

Tokyo, Japan

Shigenobu Maeda