Semiconductor Energy Laboratory Co., Ltd.

Shigeharu Monoe

Shinya Sasagawa

Takashi Yokoshima

Shunpei Yamazaki

Satoru Okamoto

Hideto Ohnuma

Ryo Arasawa

Aya Miyazaki

Tomohiko Sato

Satoshi Murakami

Akihiro Ishizuka

A wiring over a substrate capable of reducing particles between wirings and a method for manufacturing the wiring is disclosed. A wiring over a substrate capable of preventing short-circuiting between wirings due to big difference in projection and depression between wirings and a method for manufacturing the wiring is also disclosed. Further, a wiring over a substrate capable of preventing cracks in the insulating layer due to stress at the edge of a wiring or particles and a method for manufacturing the wiring is also disclosed. According to the present invention, a method for manufacturing a wiring over a substrate is provided that comprises the steps of: forming a first conductive layer over an insulating surface; forming a first mask pattern over the first conductive layer; forming a second mask pattern by etching the first mask pattern under a first condition, simultaneously, forming a second conductive layer having a side having an angle of inclination cross-sectionally by etching the first conductive layer; and forming a third conductive layer and a third mask pattern by etching the second conductive layer and the second mask pattern under a second condition; wherein a selective ratio under the first condition of the first conductive layer to the first mask pattern is in a range of 0.25 to 4, and a selective ratio under the second condition of the second conductive layer to the second mask pattern is larger than that under the first condition.

Wiring over substrate, semiconductor device, and methods for manufacturing thereof

An object is to provide a semiconductor device in which damages of an element such as a transistor are reduced even when physical force such as bending is externally applied to generate stress in the semiconductor device. A semiconductor device includes a semiconductor film including a channel formation region and an impurity region, which is provided over a substrate, a first conductive film provided over the channel formation region with a gate insulating film interposed therebetween, a first interlayer insulating film provided to cover the first conductive film, a second conductive film provided over the first interlayer insulating film so as to overlap with at least part of the impurity region, a second interlayer insulating film provided over the second conductive film, and a third conductive film provided over the second interlayer insulating film so as to be electrically connected to the impurity region through an opening.

Semiconductor device

The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device comprises steps of forming a conductive layer electrically connecting to a transistor, an insulating layer covering the conductive layer, and a mask formed over the insulating layer; and etching the insulating layer with a processing gas including a hydrogen bromide gas.

Etching method and manufacturing method of semiconductor device

The present invention provides a TFT including at least one LDD region in a self-alignment manner without forming a sidewall spacer and increasing the number of manufacturing steps. A photomask or a reticle provided with an assist pattern that is formed of a diffraction grating pattern or a semi-transmitting film and has a function of reducing light intensity is employed in a photolithography step of forming a gate electrode, an asymmetrical resist pattern having a region with a thick thickness and a region with a thickness thinner than that of the above region on one side is formed, a gate electrode having a stepped portion is formed, and an LDD region is formed in a self-alignment manner by injecting an impurity element to the semiconductor layer through the region with a thin thickness of the gate electrode.

Semiconductor device and manufacturing method thereof

Method for manufacturing a wiring over a substrate

To provide a manufacturing method in which LDD regions with different widths are formed in a self-aligned manner, and the respective widths are precisely controlled in accordance with each circuit. By using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function formed of a diffraction grating pattern or a semi-transparent film, the width of a region with a small thickness of a gate electrode can be freely set, and the widths of two LDD regions capable of being formed in a self-aligned manner with the gate electrode as a mask can be different in accordance with each circuit. In one TFT, both of two LDD regions with different widths overlap a gate electrode.

Semiconductor device and manufacturing method of the same

It is an object of the present invention to provide a method for manufacturing a highly reliable semiconductor device with preferable yield. In the invention, two-step etching is performed when selectively removing an interlayer insulating film with at least two layers constituting a semiconductor device, and forming an opening. One feature of the invention is that at least either one of a first gas (a first etching gas) and a second gas (a second etching gas) used at the time of the two-step etching is added with an inert gas.

Method for manufacturing a semiconductor device

The present invention relates to a method for manufacturing a semiconductor film, including the steps of forming a transparent conductive film, forming a first conductive film over the transparent conductive film, forming a second conductive film over the first conductive film, etching the second conductive film with a gas including chlorine, and etching the first conductive film with a gas including fluorine. During etching of the second conductive film with a gas including chlorine, the transparent conductive film is protected by the first conductive film. During etching of the first conductive film with the gas including fluorine, the transparent conductive film does not react with the gas including fluorine. Therefore, no particle is formed.

Method for manufacturing semiconductor device

It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristics with high yield. In a method for manufacturing a semiconductor device according to the present invention, a first layer is formed over a substrate, second layer is formed on the first layer, the first layer and the second layer are etched to form a first pattern, and the second layer in the first pattern is selectively etched with plasma of boron trichloride, chlorine, and oxygen using ECR (Electron Cyclotron Resonance) or ICP (Inductively Coupled Plasma) to form a second pattern.

Manufacturing method for semiconductor device

A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al&#x2014;Ti)/Ti (or TiN).

Light-emitting apparatus

In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an edge of a second conductive film to shorten an LDD region. It is an object to make the LDD region longer by reducing or removing the left portion that is not etched. After a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, an argon plasma treatment is performed. With this argon plasma treatment, a reactive organism in the taper etching process is removed, and it becomes possible to reduce or remove the left portion that is not etched in the anisotropic etching to be performed next.

Growing community of inventors

Kanagawa, Japan

Shigeharu Monoe