Taiwan Semiconductor Manufacturing Comp. Ltd.

Shi-Min Wu

Hsin-Li Cheng

Jyun-Ying Lin

Shu-Hui Su

Ting-Chen Hsu

Alexander Kalnitsky

Felix Ying-Kit Tsui

Kang-Min Kuo

Shih-Fen Huang

Yu-Chi Chang

Tuo-Hsin Chien

Cong-Min Fang

YingKit Felix Tsui

Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.

Trench capacitor film scheme to reduce substrate warpage

Various embodiments of the present disclosure are directed towards an integrated chip including a capacitor over a substrate. The capacitor includes a plurality of conductive layers and a plurality of dielectric layers. The plurality of conductive layers and dielectric layers define a base structure and a first protrusion structure extending downward from the base structure towards a bottom surface of the substrate. The first protrusion structure comprises one or more surfaces defining a first cavity. A top of the first cavity is disposed below the base structure.

Trench capacitor profile to decrease substrate warpage

Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.

A semiconductor device includes a semiconductive substrate, a first semiconductive fin and a second semiconductive fin extending upwards from the semiconductive substrate, an isolation structure at least partially between the first semiconductive fin and the second semiconductive fin, a first semiconductive raised portion and a second semiconductive raised portion. The first semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive fin and the second semiconductive fin. A top surface of the first semiconductive fin is higher than a top surface of the first semiconductive raised portion. The second semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive raised portion and the second semiconductive fin.

Semiconductor device having fins

Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.

A method of manufacturing a semiconductor structure includes the following steps. A first raised portion is formed on a semiconductor substrate. The height of the first raised portion is reduced, and a dielectric material is formed over the first raised portion. The dielectric material is annealed such that the first raised portion is tilted.

Method of manufacturing a semiconductor structure having a buried raised portion

A semiconductor structure includes a semiconductor substrate, a first active area, a second active area, a first trench, at least one raised portion, and a first dielectric. The first active area is in the semiconductor substrate. The second active area is in the semiconductor substrate. The first trench is in the semiconductor substrate and separates the first active area and the second active area from each other. The raised portion is raised from the semiconductor substrate and is disposed in the first trench. The first dielectric is in the first trench and covers the raised portion.

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Changhua County, Taiwan

Shi-Min Wu