Lam Research Corporation

Shenjian Liu

Qian Fu

Wonchul Lee

Bryan Y Pu

Youn Gi Hong

Shih-Yuan Cheng

Hong Shih

John Edward Daugherty

Duane Outka

Linda Fung-Ming Lee

Harmeet Singh

Katrina Mikhaylichenko

Mark Henry Wilcoxson

Tom A Kamp

Gregory James Goldspring

Linda B Braly

Glenn W Gale

Zhigang Mao

Sam Do Lee

In Deog Bae

Denis Syomin

Sok Kiow Tan

I C Jang

A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.

Line width roughness improvement with noble gas plasma

A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

Plasma etch method to reduce micro-loading

A method for forming a photoresist mask may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a substrate, ionizing the UV producing gas to produce UV rays to irradiate the substrate, and etching features into the substrate through the photoresist mask.

A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.

Pulsed bias plasma process to control microloading

A method of installing a component of a plasma processing chamber by replacing a used component with a component made by forming a dual-layer green body and co-sintering the dual-layer green body so as to form a three-layer component. The three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. The component is installed such that the outer layer of yttria is exposed to the plasma environment when the chamber is in operation.

Extending lifetime of yttrium oxide as a plasma chamber material

A method for etching features of different aspect ratios in a tungsten containing layer is provided. An etch gas is provided containing a tungsten etch component and a deposition component. A plasma is formed from the provided etch gas. A tungsten containing layer patterned with wide and narrow features is etched with the provided plasma.

Method of controlling etch microloading for a tungsten-containing layer

A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.

Method and apparatus for pattern collapse free wet processing of semiconductor devices

A method for selectively etching a high-k dielectric layer with respect to a polysilicon material is provided. The high-k dielectric layer is partially removed by Ar sputtering, and then the high-k dielectric layer is etched using an etching gas comprising BCl. The high-k dielectric layer and the polysilicon material may be formed on a substrate. In order to partially remove the high-k dielectric layer, a sputtering gas containing Ar is provided into an etch chamber in which the substrate is placed, a plasma is generated from the sputtering gas, and then the sputtering gas is stopped. In order to etch the high-k dielectric layer, the etching gas is provided into the etch chamber, a plasma is generated from the etching gas, and then the etching gas is stopped.

Selective etch of high-k dielectric material

Two methods of extending the lifetime of yttrium oxide as a plasma chamber material are provided. One method comprises making a three-layer component of a plasma processing chamber by co-sintering a dual-layer green body where one layer comprises ceramic particles and a second layer comprises yttria particles. The two layers are in intimate contact during the sintering process. In a preferred embodiment, the three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. Optionally, the disks are pressed together during the sintering process. The resulting three-layer component is very low in porosity. Preferably, the porosity of any of the outer layer of yttria, the intermediate layer of YAG, and the second outer layer of alumina, is less than 3%. The second method comprises sealing an yttria plasma spray coated component by applying a liquid anaerobic sealant with a room temperature viscosity of less than 50 cP to the component by brushing the sealant on all yttria surfaces of the component, wet cleaning the component, curing the wet cleaned component for over 2 hours at a temperature of at least 150&#xb0; C. in an N2 environment; and, applying a second sealant coat to the cured substrate by repeating the procedure used to apply the first coat.

A method of forming devices is provided. A phase change layer is provided. The phase change layer is etched by providing an etch gas comprising a bromine containing compound and forming a plasma from the etch gas. The phase change layer is of a material that may be heated by a current and then when cooled, either forms an amorphous material or a crystalline material, depending on how fast the material is cooled. In addition, the amorphous material has a resistance at least several times greater than the crystalline material.

Phase change alloy etch

A method for etching features of different aspect ratios in a conductive layer is provided. The method comprises: depositing over the conductive layer with an aspect ratio dependent deposition; etching features into the conductive layer with an aspect ratio dependent etching of the conductive layer; and repeating the depositing and the etching at least once.

Method for reducing microloading in etching high aspect ratio structures

The embodiments provides an improved tungsten silicide etching process with reduced etch rate micro-loading effect. In one embodiment, a method for etching a layer formed on a substrate is provided. The method includes providing a substrate into a plasma processing chamber, the substrate having a metal silicide layer formed thereon and a patterned mask defined over the metal silicide layer. The method also includes supplying an etching gas mixture of a fluorine-containing gas, a chlorine-containing gas, a nitrogen-containing gas, and an oxygen-containing gas to the plasma processing chamber, wherein the ratio of the nitrogen-containing gas to the fluorine-containing gas is between about 5 to about 15. In addition, the method includes generating a plasma in the plasma processing chamber using the supplied etching gas mixture to etch the metal silicide layer in regions not covered by the patterned mask, the patterned mask defining dense regions and isolated regions, wherein the generated plasma is configured to remove the metal silicide layer in the dense regions and the isolated regions at a reduced etch rate micro-loading.

Tungsten silicide etch process with reduced etch rate micro-loading

A method of forming conductive connections for semiconductor devices is provided. An organic low-k dielectric layer is formed over a wafer. A conductive aluminum containing layer is formed over the organic low-k dielectric layer. The wafer is placed in an etch chamber. An etch gas comprising HBr is provided into the etch chamber. A plasma is formed from the etch gas comprising HBr. The plasma from the etch gas comprising HBr is used to selectively etch the conductive aluminum containing layer with respect to the low-k dielectric layer.

Method for selectively etching an aluminum containing layer

This invention relates to a method for reducing halogen gasses and byproducts in post-etch applications. The method consists of exposing the substrate to O /N plasma and water vapor in a process chamber.

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Fremont, CA, United States of America

Shenjian Liu