Siliconware Precision Industries Co., Ltd.

Sheng-Li Lu

Hsien-Wen Chen

Ching-Wen Chiang

Kuang-Hsin Chen

Yuen-Han Wang

Jih-Fu Wang

Kuan-Yu Yang

A method of fabricating an electronic package is provided, including: providing a carrier body having a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since temporary material is required. The present invention further provides the electronic package thus fabricated.

Method of fabricating electronic package

A met of fabricating an electronic package is provided, including: providing a carrier body haying a first surface formed with a plurality of recessed portions, and a second surface opposing the first surface and interconnecting with the recessed portions; forming on the first surface of the carrier body an electronic structure that has a plurality of conductive elements received in the recessed portions correspondingly; and removing a portion of the carrier body, with the conductive elements exposed from the second surface of the carrier body. Therefore, the carrier body is retained, and the fabrication cost is reduced since no temporary material is required. The present invention further provides the electronic package thus fabricated.

Electronic package and method of fabricating the same

A semiconductor package and a fabrication method thereof are disclosed, which is characterized in that a solder material is used to bond an LED chip and a substrate so as to provide a thick joint between the substrate and the LED chip and hence reduce stresses generated between the LED chip and the substrate due to their CTE mismatch, thereby preventing delamination from occurring between the LED chip and the substrate after a reliability test.

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Taichung, Taiwan

Sheng-Li Lu