Taiwan Semiconductor Manufacturing Comp. Ltd.

Shen-Yang Lee

Hsiang-Pi Chang

Pinyen Lin

Huang-Lin Chao

Chung-Liang Cheng

Tzer-Min Shen

Chansyun David Yang

Fu-Ting Yen

Yao-Sheng Huang

Yen-Tien Tung

Yu-Chia Liang

I-ming Chang

Chia-Ling Pai

A method for manufacturing a semiconductor device includes: forming a semiconductor stack on a semiconductor substrate in a flat state, the semiconductor stack including sacrificial layer portions and channel layer portions that are alternately stacked over one another; forming source/drain trenches in the semiconductor stack, each of the source/drain trenches penetrating the channel layer portions, the sacrificial layer portions and an upper portion of the semiconductor substrate, and terminating at a lower portion of the semiconductor substrate, so as to form the channel layer portions into channel features and form the sacrificial layer portions into sacrificial features; transforming the semiconductor substrate from the flat state to a bending state; forming source/drain regions in the source/drain trenches, respectively; and reverting the semiconductor substrate from the bending state back to the flat state, so as to induce a strain in the channel features.

Semiconductor device having strained channel and method for manufacturing the same

A method for tuning a threshold voltage of a transistor is disclosed. A channel layer is formed over a substrate. An interfacial layer is formed over and surrounds the channel layer. A gate dielectric layer is formed over and surrounds the interfacial layer. A dipole layer is formed over and wraps around the gate dielectric layer by performing a cyclic deposition etch process, and the dipole layer includes dipole metal elements and has a substantially uniform thickness. A thermal drive-in process is performed to drive the dipole metal elements in the dipole layer into the gate dielectric layer to form an interfacial dipole surface, and then the dipole layer is removed.

Transistor and semiconductor device with multiple threshold voltages and fabrication method thereof

A semiconductor device includes a channel layer, an interfacial layer, a gate dielectric layer, a gate electrode, dipole elements, and additional elements. The interfacial layer is disposed on the channel layer, and includes an insulating material. The gate dielectric layer is disposed over the interfacial layer such that the channel layer is separated from the gate dielectric layer by the interfacial layer. The gate electrode is disposed on the gate dielectric layer. The dipole elements are present in at least one of the interfacial layer and the gate dielectric layer in a predetermined amount such that the semiconductor device has a predetermined threshold voltage. The additional elements are located at a region where the dipole elements are present so as to reduce interfacial defects caused by the dipole elements. The additional elements are different from the dipole elements. Methods for manufacturing the semiconductor device are also disclosed.

Semiconductor device with tunable threshold voltage and method for manufacturing the same

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Hsinchu, Taiwan

Shen-Yang Lee