Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

International Business Machines Corporation

Stmicroelectronics S.a.

Stmicroelectronics Gmbh

Stmicroelectronics (crolles 2) Sas

Soitec

Stmicroelectronics (rousset) Sas

Commissariat a L'energie Atomique Et Aux Energies Alternatives

Shay Reboh

Remi Coquand

Emmanuel Augendre

Nicolas J Loubet

Sylvain Maitrejean

Pablo Acosta Alba

Frederic Mazen

Perrine Batude

Tenko Yamashita

Laurent Grenouillet

Yves Morand

Cyrille Le Royer

Benoit Sklenard

Jingyun Zhang

Nicolas Posseme

Pierre Morin

Oleg Kononchuk

Didier Landru

Fabrice Nemouchi

Nadia Ben Mohamed

Jean-Michel Hartmann

Sylvain Barraud

Frédéric Mazen

Francois Rieutord

Guillaume Audoit

Damien Massy

Nicolas Bernier

Loic Gaben

Frédéric Milesi

Kangguo Cheng

Maud Vinet

Hubert Moriceau

Frank Fournel

Romain Wacquez

Aomar Halimaoui

Francois Andrieu

Raluca Tiron

Vincent Larrey

Heimanu Niebojewski

Benoit Mathieu

François Andrieu

Emmanuel Rolland

Robin H Chao

François Rieutord

Virginie Loup

Rémy Gassilloud

Victor Boureau

Benoît Sklenard

Thomas Lorne

Aurore Bonneviaille

Christophe Plantier

Jean-Pierre Colinge

Flavia Piegas Luce

Rémi Coquand

Loïc Gaben

Benoît Mathieu

A method for manufacturing a semiconductor-on-insulator substrate by BESOI comprising the following steps: a) provide a structure comprising a first substrate, a first stopping layer made of SiGe having an atomic percentage of Ge lower than or equal to 30%, an intermediate layer, a second stopping layer made of SiGe having a thickness smaller than the thickness of the first stopping layer and an atomic percentage of Ge higher than or equal to 20%, optionally an active area formed by a layer made of silicon or by a stack of active layers made of Si and SiGe, a dielectric layer, a second substrate, b) thin and then etch the first substrate made of silicon, from the first main face up to the second main face, c) successively remove the first stopping layer, the intermediate layer, and optionally the second stopping layer to obtain a SOI or SiGeOI substrate.

Method for manufacturing a SOI or SiGeOI type semiconductor-on-insulator substrate by BESOI and structure for manufacturing such a substrate

A method of polishing a semiconductor substrate, including: a) a step of multiple implantations of ions from an upper surface of the substrate, to modify the material of an upper portion of the substrate, the multiple implantation step comprising a plurality of successive implantations under different respective implantation orientations; and b) a step of selective removal of the upper portion of the substrate.

Semiconductor substrate polishing method

A method is provided for modifying a strain state of a block of a semiconducting material including steps in the following order: a) making a lower region of the block of the semiconducting material resting on a substrate amorphous, while a crystalline structure of an upper region of the block in contact with the lower region is maintained, then b) forming a stressing zone on the block of the semiconducting material, then c) making at least one creep annealing with a suitable duration and temperature to enable creep of the lower region without recrystallizing a material of the lower region, and then d) making at least one recrystallization annealing of the lower region of the block.

Method for modifying the strain state of a block of a semiconducting material

A method for modifying a strain state of at least one semiconductor layer includes providing a support over which is arranged at least one stack of layers including the semiconductor layer and a fusible layer, arranged between the semiconductor layer and the support. The method also includes melting at least one portion of the fusible layer including the passage of said at least one portion of the fusible layer from a solid state into a liquid state, the semiconductor layer remaining in the solid state during the melting step. A laser beam may be used for the melting. The melting with the laser beam may also cause the modification of the strain state of the semiconductor layer.

Method for modifying a strain state of at least one semiconductor layer

A method for creating a substrate of the semiconductor on insulator type includes steps of a) providing a donor substrate having a monocrystalline support substrate, a smoothing layer and a semiconductor layer, the smoothing layer forming an etch stop layer with respect to the material of the support substrate; a') implantation of ion species through the semiconductor layer to form a fragilisation plane; b) creating an assembly by placing the donor substrate and a receiver substrate in contact; and c) transferring the semiconductor layer and at least a part of the smoothing layer by detachment along the fragilization plane. The semiconductor layer provided in a) is monocrystalline. The method may further include, before b), amorphization of at least a part of the semiconductor layer to form an amorphous layer; and during or after c), recrystallization in solid phase of the amorphous layer to form a transferred monocrystalline semiconductor layer.

Low-temperature method for transfer and healing of a semiconductor layer

A method for forming at least one doped region of a transistor includes providing a stack having an insulating layer, an active layer, and a gate pattern having a first lateral flank and removing a first portion of the active layer not overlaid by the gate pattern and extending down to the gate pattern, at the edge of a second portion of the active layer overlaid by the gate pattern, so as to expose an edge of the second portion. The edge extends substantially in a continuation of the lateral flank of the gate pattern. The method also includes forming a first spacer having an L shape and having a basal portion in contact with the insulating layer and a lateral portion in contact with the lateral flank; forming a second spacer on the first spacer; removing the basal portion of the first spacer by selective etching with respect to the second spacer, so as to expose the edge of the second portion; and forming the doped region by epitaxy from the exposed edge.

Method for fabricating a doped region of a microelectronic device

A method for forming a doped zone of a transistor includes providing a stack having at least one active layer made from a semiconductor material, and a transistor gate pattern having at least one lateral side, and modifying a portion of the active layer so as to form a modified portion made of a modified semiconductor material. The modified portion extends down to the at least one lateral side of the gate pattern, at the edge of a non-modified portion above which the gate pattern is located. The method also includes forming a spacer on the lateral side, removing the modified portion by selective etching of the modified semiconductor material with respect to the semiconductor material of the non-modified portion, so as to expose an edge of the non-modified portion, and forming the doped zone by epitaxy starting from the exposed edge.

Method for manufacturing a doped zone of a microelectronic device

The invention relates to a method for forming a porous portion in a substrate, an implantation of ions in at least one region of a layer, for example based on a semiconductor material, so as to form a portion enriched with at least one gas in the implanted region, and then a laser annealing of the nanosecond type so as to form a porous portion. The use of the ion implantation makes it possible to dissociate the deposition of the layer based on semiconductor material from the incorporation of gas. A great variety of porous structures can be obtained by the method. These porous structures can be adapted for numerous applications according to the properties sought.

Method of forming a porous portion in a substrate

Producing a semiconductor or piezoelectric on-insulator type substrate for RF applications which is provided with a porous layer under the BOX layer and under a layer of polycrystalline semiconductor material.

RF substrate structure and method of production

A method for producing a semiconductor substrate is provided, including: producing a superficial layer arranged on a buried dielectric layer and including a strained semiconductor region; producing an etching mask on the superficial layer, covering a part of the region; etching the superficial layer to a pattern of the mask, exposing a first lateral edge of a first strained semiconductor portion belonging to the part and contacting the dielectric layer; forming a mechanical barrier from a second portion of material belonging to the first portion, the second portion having a bottom surface contacting the dielectric layer and an upper surface contacting the mask, the barrier arranged against the part and bearing mechanically against the second portion, and removing the mask.

Method of fabricating a semiconductor substrate having a stressed semiconductor region

A method for transferring a thin layer from a donor substrate to a receiver substrate including the steps of implantation of species carried out in a uniform manner on the whole of the donor substrate to form therein an embrittlement plane which delimits the thin layer and a bulk part of the donor substrate, of placing in contact the donor substrate and the receiver substrate and of initiating and propagating a fracture wave along the embrittlement plane. The method comprises, before the placing in contact, a step of localised reduction of a capacity of the embrittlement plane to initiate the fracture wave. This step of localised reduction may be carried out by means of a localised laser annealing of the donor substrate.

Method for layer transfer with localised reduction of a capacity to initiate a fracture

A method for producing a semiconductor-on-insulator type substrate includes epitaxial deposition of a first semiconductor layer on a smoothing layer supported by a monocrystalline support substrate to form a donor substrate; production of an assembly by contacting the donor substrate with a receiver substrate; transfer, onto the receiver substrate, of the first semiconductor layer, the smoothing layer and a portion of the support substrate; and selective etching of the portion of the support substrate relative to the smoothing layer. The epitaxial deposition of the first semiconductor layer can be preceded by a surface preparation annealing of the support substrate at a temperature greater than 650&#xb0; C. After the selective etching of the portion of the support substrate, selective etching of the smoothing layer relative to the first semiconductor layer and epitaxial deposition of a second semiconductor layer on the first semiconductor layer may be carried out in an epitaxy frame.

Low-temperature method for manufacturing a semiconductor-on-insulator substrate

Substrates may include a useful layer affixed to a support substrate. A surface of the useful layer located on a side of the useful layer opposite the support substrate may include a first region and a second region. The first region may have a first surface roughness, may be located proximate to a geometric center of the surface, and may occupy a majority of an area of the surface. The second region may have a second, higher surface roughness, may be located proximate to a periphery of the surface, and may occupy a minority of the area of the surface.

Substrates including useful layers

Making of a transistor structure comprising in this order:

Method for germanium enrichment around the channel of a transistor

A production method for a semi-conductor-on-insulator type multilayer stack includes ion implantation in a buried portion of a superficial layer of a support substrate, so as to form a layer enriched with at least one gas, intended to form a porous semi-conductive material layer, the thermal oxidation of a superficial portion of the superficial layer to form an oxide layer extending from the surface of the support substrate, the oxidation and the implantation of ions being arranged such that the oxide layer and the enriched layer are juxtaposed, and the assembly of the support substrate and of a donor substrate.

Multilayer stack of semiconductor-on-insulator type, associated production process, and radio frequency module comprising it

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Grenoble, France

Shay Reboh