Taiwan Semiconductor Manufacturing Comp. Ltd.

Shang-Wern Chang

Ching-Yu Chang

Chien-Wei Wang

Heng-Hsin Liu

Jing Hong Huang

Kuei-Shun Chen

Yung-Yao Lee

Chia-Chu Liu

Chih-Yang Yeh

Yen-Hao Chen

Ying-Ying Wang

Chien-Hung Wang

Ren-Jyh Leu

A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.

Materials and methods for forming resist bottom layer

In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.

Pattern formation method and material for manufacturing semiconductor devices

A baking apparatus for priming a substrate is provided, which includes a chamber, a hot plate and a barrier element. The hot plate is in the chamber and configured to bake the substrate on the hot plate. The barrier element is in contact with a periphery of the substrate and the hot plate to prevent contamination on a lower surface of the substrate. Another baking apparatus for priming a substrate is also provided, which includes a chamber and a hot plate. The hot plate is in the chamber and in full contact with a lower surface of the substrate to prevent contamination thereon.

Baking apparatus for priming substrate

The present disclosure provides an overlay metrology method, an overlay control method and an overlay control system. The overlay metrology method includes capturing a current layer image of a current overlay mark on a current layer with a current focal length and capturing a previous layer image of a previous overlay mark on a previous layer with a previous focal length. Then, the overlay metrology method further includes combining the current layer image with the previous layer image to form an overlay mark image and determining an overlay error between the current overlay mark and the previous overlay mark based on the overlay mark image.

Overlay metrology method and overlay control method and system

A method for etching an ultra thin film is provided which includes providing a substrate having the ultra thin film formed thereon, patterning a photosensitive layer formed over the ultra thin film, etching the ultra thin film using the patterned photosensitive layer, and removing the patterned photosensitive layer. The etching process includes utilizing an etch material with a diffusion resistant carrier such that the etch material is prevented from diffusing to a region underneath the photosensitive layer and removing portions of the ultra thin film underneath the photosensitive layer.

Growing community of inventors

Zhubei, Taiwan

Shang-Wern Chang