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Portland, OR, United States of America

Seshu V Sattiraju

Average Co-Inventor Count = 7.41

ph-index = 3

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 44

Seshu V SattirajuKevin J Lee (4 patents)Seshu V SattirajuMark T Bohr (3 patents)Seshu V SattirajuAndrew W Yeoh (3 patents)Seshu V SattirajuChristopher M Pelto (3 patents)Seshu V SattirajuHiten Kothari (3 patents)Seshu V SattirajuHang-Shing Ma (3 patents)Seshu V SattirajuJohn P Barnak (1 patent)Seshu V SattirajuMing Fang (1 patent)Seshu V SattirajuTzuen-Luh Huang (1 patent)Seshu V SattirajuMargherita Chang (1 patent)Seshu V SattirajuGerald B Feldewerth (1 patent)Seshu V SattirajuHarry Y Liang (1 patent)Seshu V SattirajuAndrew W H Yeoh (1 patent)Seshu V SattirajuSeshu V Sattiraju (4 patents)Kevin J LeeKevin J Lee (44 patents)Mark T BohrMark T Bohr (165 patents)Andrew W YeohAndrew W Yeoh (30 patents)Christopher M PeltoChristopher M Pelto (16 patents)Hiten KothariHiten Kothari (10 patents)Hang-Shing MaHang-Shing Ma (3 patents)John P BarnakJohn P Barnak (17 patents)Ming FangMing Fang (9 patents)Tzuen-Luh HuangTzuen-Luh Huang (2 patents)Margherita ChangMargherita Chang (2 patents)Gerald B FeldewerthGerald B Feldewerth (2 patents)Harry Y LiangHarry Y Liang (1 patent)Andrew W H YeohAndrew W H Yeoh (1 patent)
..
Inventor’s number of patents
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Strength of working relationships

Company Filing History:

1. Intel Corporation (4 from 54,858 patents)


4 patents:

1. 9530740 - 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

2. 9449913 - 3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias

3. 9142510 - 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

4. 7064446 - Under bump metallization layer to enable use of high tin content solder bumps

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