Applied Materials, Inc.

Seshadri Ganguli

Mei Yin Chang

Srinivas Gandikota

Christophe Marcadal

Ling Chen

Sang Ho Yu

Paul F Ma

Yixiong Yang

Dien-Yeh Wu

Schubert S Chu

Vincent W Ku

Xinliang Lu

Hua Chung

Yu Lei

Jacqueline S Wrench

Xinyu Fu

Shih Chung Chen

Sang-Ho Yu

Wei V Tang

Atif Noori

Kavita Shah

Hyoung-Chan Ha

David P Thompson

Maitreyee Mahajani

Alan Hiroshi Ouye

See-Eng Phan

Jenny Lin

Hoon Sik Kim

Jeffrey W Anthis

Bo Zheng

Naomi Yoshida

Joung Joo Lee

Kevin Vincent Moraes

Norman M Nakashima

Wei Cao

Avgerinos V Gelatos

Amit Khandelwal

Xi Cen

Frederick C Wu

Yong Yang

Siddarth A Krishnan

Anantha K Subramani

Wei Ti Lee

Steven C H Hung

Liqi Wu

Lu Chen

Jing Zhou

Feng Quan Liu

Roey Shaviv

Jianshe Tang

Suketu Arun Parikh

Patricia M Liu

Joseph F AuBuchon

Kai Wu

Sanjay S Natarajan

Annamalai Lakshmanan

Murali K Narasimhan

Gill Yong Lee

Sang-Hyeob Lee

Sung-Kwan Kang

Lin Dong

Rong Tao

Jiang Lu

David Maxwell Gage

Priyadarshi Panda

Shirish A Pethe

Faruk Gungor

Guoqiang Jian

Wei W Wang

Michael Patrick Chudzik

John C Forster

Robert Jan Visser

Xianmin Tang

Abhilash J Mayur

Mandyam Sriram

Alfred W Mak

Lan Yu

Mohith E Verghese

Roderick Craig Mosely

Prerna Sonthalia Goradia

Norman L Tam

Yu Wen Chang

Feng Chen

Benjamin Schmiege

Jick M Yu

Atashi Basu

Adam Brand

Michael Sterling Jackson

Vikash Banthia

Geetika Bajaj

Rajesh Sathiyanarayanan

Wei Lei

David Michael Thompson

Nirmalya Maity

Mohan K Bhan

Olkan Cuvalci

Martin Jeff Salinas

Bhushan N Zope

Anqing Cui

Wenyu Zhang

Conformally deposited molybdenum films having reduced resistivity and methods of forming the same are disclosed. The methods include converting an amorphous silicon layer to a metal layer by thermally soaking the amorphous silicon layer comprising silicon atoms in the presence of a metal compound selected from the group consisting of a molybdenum compound and a tungsten compound until at least a portion of the silicon atoms in the amorphous silicon layer are replaced by metal atoms selected from the group consisting of molybdenum atoms and tungsten atoms. The methods include conformally depositing a molybdenum film on the metal layer.

Conformal molybdenum deposition

A method of forming a contact structure in a semiconductor device having a feature includes forming a barrier layer in the feature, wherein the barrier layer is TiN; and forming a metal layer in the feature and over the barrier layer, wherein the metal layer is at least one of aluminum (Al), ruthenium (Ru), or molybdenum (Mo).

Methods and apparatus for seam reduction or elimination

Embodiments of the disclosure relate to methods and materials for forming barrier layers with enhanced barrier performance and/or reduced via resistance. Some embodiments of the disclosure provide methods for passivating a metal surface by exposing the metal surface to a metal complex comprising an organic ligand with at least three carbon atoms and a double or triple bond that eta bonds with a central metal atom. Some embodiments provide barrier layers within vias which enable a reduction in resistance of at least 25% as a result of thinner barrier layers with equivalent barrier properties.

Methods and materials for enhanced barrier performance and reduced via resistance

Methods of depositing a metal film are discussed. A metal film is formed on the bottom of feature having a metal bottom and dielectric sidewalls. Formation of the metal film comprises exposure to a metal precursor and an alkyl halide catalyst while the substrate is maintained at a deposition temperature. The metal precursor has a decomposition temperature above the deposition temperature. The alkyl halide comprises carbon and halogen, and the halogen comprises bromine or iodine.

Gap fill methods using catalyzed deposition

A processing method comprises positioning a substrate in a processing chamber and setting a temperature of the substrate to a range of 50° C. to 500° C.; conducting an atomic layer deposition (ALD) cycle on the substrate; and repeating the ALD cycle to form a silicon oxide film. The ALD cycle comprises: exposing the substrate to an aminosilane precursor in the processing chamber by pulsing a flow of the aminosilane precursor; purging the processing chamber of the aminosilane precursor; exposing the substrate to an oxidizing agent by pulsing a flow of the oxidizing agent for a duration in a range of greater than or equal to 100 milliseconds to less than or equal to 3 seconds; and purging the processing chamber of the oxidizing agent.

Deposition of silicon-based dielectric films

Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.

Enhancing gapfill performance of dram word line

Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which comprise an integrated dipole region to meet reduced thickness and lower thermal budget requirements. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, and a dipole region having an interfacial layer, a metal film substantially free of non-metal atoms on the interfacial layer, and a high-κ dielectric layer on the metal film. In some embodiments, the dipole region of the electronic devices comprises an interfacial layer, a high-κ dielectric layer on the interfacial layer, and a metal film on the high-κ dielectric layer. In some embodiments, the methods comprise annealing the substrate to drive particles of metal from the metal film into one or more of the interfacial layer or the high-κ dielectric layer.

Integrated dipole region for transistor

A sacrificial sealing layer is formed on a high-κ metal gate (HKMG) stack to suppress oxidants, e.g., oxygen and water, from impacting the metal gate stack, thus preserving the device EOT. The method integrated processes that include forming an interfacial layer on the substrate; forming a high-κ metal oxide layer on the interfacial layer, the high-κ metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region; depositing a capping layer on the high-κ metal oxide layer; and forming a sacrificial sealing layer on the capping layer. The dipole region is formed by driving a dopant species, e.g., zinc (Zn), vanadium (V), tungsten (W), molybdenum (Mo), ruthenium (Ru), titanium (Ti), tantalum (Ta), zirconium (Zr), aluminum (Al), niobium (Nb), or mixtures thereof, of a dipole film into the high-κ metal oxide layer to form a dipole region.

Amorphous silicon-based scavenging and sealing EOT

Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.

Low resistivity DRAM buried word line stack

Methods of depositing a metal film with high purity are discussed. Some embodiments utilize a thermal ALD process comprising an alkyl halide and a metal precursor. Some embodiments selectively deposit a metal film with high purity on a metal surface over a dielectric surface. Some embodiments selectively deposit a metal film with high purity on a dielectric surface over a metal surface. Some embodiments deposit a metal film with greater than 99% metal atoms on an atomic basis.

Catalyzed deposition of metal films

Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface. In another embodiment, a deposition-treatment cycle includes performing the vapor deposition process and subsequently a post-treatment process, which deposition-treatment cycle may be repeated to form multiple cobalt capping layers.

Selective cobalt deposition on copper surfaces

Methods and apparatus for creating a dual metal interconnect on a substrate. In some embodiments, a first liner of a first nitride material is deposited into at least one 1X feature and at least one wider than 1X feature, the first liner has a thickness of less than or equal to approximately 12 angstroms; a second liner of a first metal material is deposited into the at least one 1X feature and at least one wider than 1X feature; the first metal material is reflowed such that the at least one 1X feature is filled with the first metal material and the at least one wider than 1X feature remains unfilled with the first metal material; a second metal material is deposited on the first metal material, and the second metal material is reflowed such that the at least one wider than 1X feature is filled with the second metal material.

Methods and apparatus for forming dual metal interconnects

Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor; pre-cleaning the substrate; depositing a titanium silicide (TiSi) layer on the n transistor and on the p transistor by plasma-enhanced chemical vapor deposition (PECVD); optionally depositing a first barrier layer on the titanium silicide (TiSi) layer and selectively removing the first barrier layer from the p transistor; selectively forming a molybdenum silicide (MoSi) layer on the titanium silicide (TiSi) layer on the n transistor and the p transistor; forming a second barrier layer on the molybdenum silicide (MoSi) layer; and annealing the semiconductor structure. The method may be performed in a processing chamber without breaking vacuum.

Methods of forming semiconductor structures

Methods of depositing platinum group metal films of high purity, low resistivity, and good conformality are described. A platinum group metal film is formed in the absence of an oxidant. The platinum group metal film is selectively deposited on a conductive substrate at a temperature less than 200° C. by using an organic platinum group metal precursor.

Electronic device having an oxygen free platinum group metal film

Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.

Methods of forming molybdenum contacts

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Sunnyvale, CA, United States of America

Seshadri Ganguli