K. C. Tech Co., Ltd.

Iucf-Hyu

Seok Min Hong

Yong Kim

Jae Hyun Jeon

Hyun Ku Park

Un Gyu Paik

Dae Hyeong Kim

Jae Gun Park

Jea Gun Park

Ho Saeng Kim

Un Gyu Park

Ho Seong Kim

Dae Hyung Kim

Disclosed is a polishing slurry, particularly, a slurry for chemical mechanical polishing, which is used in a chemical mechanical polishing process for flattening a semiconductor laminate. More particularly, the present invention provides a method of producing a slurry which has high removal selectivity to a nitride layer used as a barrier film in a shallow trench isolation CMP process needed to fabricate ultra highly integrated semiconductors of 256 mega D-RAM or more (Design rule of 0.13 &#x3bc;m or less) and which decreases the occurrence of scratches on a flattened surface, and a method of polishing a substrate using the same.

Polishing slurry, method of producing same, and method of polishing substrate

Disclosed herein is a polishing slurry for chemical mechanical polishing. The polishing slurry comprises polishing particles, which have a particle size distribution including separated fine and large polishing particle peaks. The polishing slurry also comprises polishing particles, which have a median size of 50-150 nm. The present invention provides the slurry having an optimum polishing particle size, in which the polishing particle size is controlled and which is useful to produce semiconductors having fine design rules by changing the production conditions of the slurry. The present invention also provides the polishing slurry and a method of producing the same, in which a desirable CMP removal rate is assured and scratches are suppressed by controlling a polishing particle size distribution, and a method of polishing a substrate.

Disclosed herein is a polishing slurry and a method of producing the same. The polishing slurry has high selectivity in terms of a polishing speed of an oxide layer to that of a nitride layer used in CMP of an STI process which is essential to produce ultra highly integrated semiconductors having a design rule of 256 mega D-RAM or more, for example, a design rule of 0.13 &#x3bc;m or less. A method and a device for pre-treating polishing particles, a dispersing device and a method of operating the dispersing device, a method of adding a chemical additive and an amount added, and a device for transferring samples are properly employed to produce a high performance nano ceria slurry essential to CMP for a process of producing ultra highly integrated semiconductors of 0.13 &#x3bc;m or less, particularly, the STI process.

Slurry for CMP and method of polishing substrate using same

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Anseong-si, South Korea

Seok Min Hong