Texas Instruments Corporation

Sean Michael Malolepszy

Rex Warren Pirkle

David Joseph Bon

Ronald Andrew Michallick

Peter J Sakakini

George Reeves

Marty Grabham

Michael W Perry

Peter J Sakakinl

The invention discloses apparatus and methods for the formation of bond wires in integrated circuit assemblies by attaching two separate wires using a dual capillary bond head. The separate wires are preferably non-identical, for example, being of different gauges and/or material composition. According to a preferred embodiment of the invention, dual capillary bond head apparatus includes a rotatable ultrasonic horn with a pair of capillaries for selectably dispensing separate strands of bond wire and for forming bonds on bond targets. According to another aspect of the invention, a method is provided for dual capillary IC wirebonding including steps for using two dual capillary bond heads for contemporaneously attaching non-identical bond wires to selected bond targets on one or more IC package assemblies.

Dual capillary IC wirebonding

The present invention provides a process for manufacturing an integrated circuit (IC) package and an integrated circuit (IC) package. The process, without limitation, includes providing an integrated circuit chip having a configuration, and forming a layer of overcoat material over the integrated circuit chip based upon the configuration.

Process for precision placement of integrated circuit overcoat material

In a method and system for regulating an output voltage, a linear voltage regulator (LVR) includes an adjustable shunt regulator (ASR) having a limited gain, a feedback circuit (FC), and a compensation resistor (CR). The limited gain causes the output voltage of the ASR to change in response to a change in an input current of the ASR. The FC generates a feedback voltage reference in proportion to the output voltage, the feedback voltage reference being provided to the ASR to control the output voltage. The CR is coupled to the ASR and the FC. The input current flows through the CR to provide a compensating voltage across the CR. The compensating voltage is provided to the feedback circuit to compensate the limited gain, thereby providing the output voltage that is substantially independent of the input current.

Output impedance compensation for linear voltage regulators

Embodiments of the present disclosure provide a routing engine, a method of routing a test probe and a testing system employing the router or the method. In one embodiment, the routing engine is for use with a test unit having at least one test probe and includes an analysis unit configured to analyze alternative test probe routing sequences that employ representative circuit chips of a semiconductor wafer to be tested by the test unit. The routing engine also includes a selection unit configured to select at least one of the test probe routing sequences as a test probe path for testing the semiconductor wafer based on a total cost of travel for the test probe path.

Routing engine, method of routing a test probe and testing system employing the same

In accordance with the teachings of the present invention, a semiconductor device having voltage output function trim circuitry and a method for the same are provided. In a particular embodiment, the method includes electrically coupling to a main circuit of a semiconductor device a plurality of resistances each operable to determine a different output voltage range of the main circuit, electrically coupling each of the plurality of resistances to a respective one of a plurality of fuses, electrically coupling each of a plurality of fuses to a respective one of a plurality of function trim pads, and electrically decoupling all but one of the plurality of resistances by applying a respective current between the respective function trim pads and an output node sufficient to open the respective fuses.

Semiconductor device having voltage output function trim circuitry and method for same

Thick film bond surfaces () on a support structure (), such as a ceramic substrate or an IC package substrate, tend to deform during processing. A personality kit () having raised bosses () engages with and compresses the bond surfaces, resulting in a flatter, wider bond surface having improved reflectivity. The personality kit () is fit within a clamp () that can be used as a stand-alone unit or integrated into an existing machine, such as a wire bonder ().

Wirebonder to bond an IC chip to a substrate

Thick film bond surfaces ( ) on a support structure ( ), such as a ceramic substrate or an IC package substrate, tend to deform during processing. A personality kit ( ) having raised bosses ( ) engages with and compresses the bond surfaces, resulting in a flatter, wider bond surface having improved reflectivity. The personality kit ( ) is fit within a clamp ( ) that can be used as a stand-alone unit or integrated into an existing machine, such as a wire bonder ( ).

Growing community of inventors

Sherman, TX, United States of America

Sean Michael Malolepszy