Samsung Electronics Co., Ltd.

Se-Jin Shim

Young-Min Kim

Young-sun Kim

Seung-Hwan Lee

Seok-Jun Won

Young-Sun Kim

Young-Wook Park

Young-Dae Kim

Kyung-hoon Kim

Sang-Hyeop Lee

You-Chan Jin

Ju-Tae Moon

Kab-Jin Nam

Young-wook Park

Cha-Young Yoo

Seung-hee Nam

You-chan Jin

Methods of forming integrated circuit capacitors include the steps of forming a lower electrode of a capacitor by forming a conductive layer pattern (e.g., silicon layer) on a semiconductor substrate and then forming a hemispherical grain (HSG) silicon surface layer of first conductivity type on the conductive layer pattern. The inclusion of a HSG silicon surface layer on an outer surface of the conductive layer pattern increases the effective surface area of the lower electrode for a given lateral dimension. The HSG silicon surface layer is also preferably sufficiently doped with first conductivity type dopants (e.g., N-type) to minimize the size of any depletion layer which may be formed in the lower electrode when the capacitor is reverse biased and thereby improve the capacitor's characteristic Cmin/Cmax ratio. A diffusion barrier layer (e.g., silicon nitride) is also formed on the lower electrode and then a dielectric layer is formed on the diffusion barrier layer. The diffusion barrier layer is preferably made of a material of sufficient thickness to prevent reaction between the dielectric layer and the lower electrode and also prevent out-diffusion of dopants from the HSG silicon surface layer to the dielectric layer. The dielectric layer is also preferably formed of a material having high dielectric strength to increase capacitance.

Integrated circuit capacitors having doped HSG electrodes

Methods of forming integrated circuit capacitors having doped HSG electrodes

A method of forming a hemispherical grained silicon layer includes the steps of providing a microelectronic substrate including a conductive layer thereon, and heating the conductive layer to a first predetermined temperature. Hemispherical grained silicon seeds are formed on the conductive layer while maintaining the conductive layer and the substrate at a second predetermined temperature higher than the first predetermined temperature. The hemispherical grained silicon seeds are annealed at a third predetermined temperature which is lower than the second predetermined temperature thereby growing the seeds to form a hemispherical grained silicon layer on the conductive layer.

Variable temperature methods of forming hemispherical grained silicon (HSG-Si) layers

Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby

A method of forming an integrated circuit device includes forming a conductive layer on an integrated circuit substrate, and forming a buffer layer on the conductive layer opposite the integrated circuit substrate. The buffer layer and the conductive layer are patterned to provide a mesa structure including the patterned buffer and conductive layers. A conductive spacer is formed along a sidewall of the mesa structure, and a hemispherical grained silicon layer is formed on the conductive spacer opposite the sidewall of the mesa structure. The patterned buffer layer is then removed after the step of forming the hemispherical grained silicon layer. Related structures are also discussed.

Methods of forming capacitors including electrodes with hemispherical

A method of forming a capacitor structure includes the steps of forming a conductive layer on a microelectronic substrate, and forming a first hemispherical grained silicon layer on the conductive layer opposite the substrate. A protective layer is formed on the hemispherical grained silicon layer. The protective layer, the first hemispherical grained silicon layer, and the conductive layer are then patterned so that portions of the microelectronic substrate are exposed adjacent the patterned conductive layer. A second hemispherical grained silicon layer is formed on the surface of the protective layer opposite the first hemispherical grained silicon layer, on sidewalls of the patterned conductive layer, and on the exposed portions of the microelectronic substrate. Portions of the second hemispherical grained silicon layer are removed from the exposed portions of the microelectronic substrate, and the patterned protective layer is then removed.

Methods of forming hemispherical grained silicon (HSG-Si) capacitor

A method of doping a surface portion of a layer of an integrated circuit device includes the steps of forming a layer of a semiconductor material on an integrated circuit substrate and annealing the layer of the semiconductor material at a predetermined temperature while flowing a dopant gas over the layer of the semiconductor material. More particularly, the step of forming the layer of the semiconductor material can include forming a first sub-layer of the semiconductor material on the integrated circuit substrate and forming a second sublayer of the semiconductor material on the first sublayer where the second sublayer has an increased surface area. For example, the second sublayer can be a hemispherical grained silicon layer.

Annealing methods of doping electrode surfaces using dopant gases

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Se-Jin Shim