Digital Equipment Corporation

Kulicke & Soffa Holdings, Inc.

Scott M Westbrook

Jan I Strandberg

Gelston Howell

A method for forming a high density interconnect printed wiring board substrate that has a first patterned conductive layer formed over an upper surface of the substrate that includes multiple conductive lines having edges that define the boundaries of the conductive lines and a dielectric layer formed over the patterned conductive layer and between the edges of the conductive lines. The method includes forming a thin film conductive layer over the dielectric layer, and patterning the thin film conductive layer such that, after the patterning step, the thin film conductive layer overlies each of the edges of the conductive lines. In a preferred embodiment, the thin film conductive layer is patterned such that, after the patterning step, the layer overlies the edges of the conductive lines by at least 10 microns. In another aspect of the invention, a method for strengthening thin film build-up layers deposited over a high density interconnect common circuit base is taught. According to this aspect, a photo-definable thin film dielectric layer having a coefficient of expansion of less than about 10% is formed over a patterned conductive layer, and a thin film conductive layer is formed over the photo-definable thin film dielectric layer. The thin film conductive layer is then patterned to include a plurality of signal lines and a plurality of thieving lines with the thieving lines being placed between nonuniformly spaced signal lines to provide a substantially uniform combined pattern of signal lines and thieving lines.

Method for controlling stress in thin film layers deposited over a high density interconnect common circuit base

A high density electrical interconnection device provides a uniform complementary pattern of thieving lines on both X and Y interconnect layers of the high density device to provide for uniform plating of the copper conductors, as well as reducing both nonuniformity and the amount of contraction and expansion of the insulating substrate. The complementary line pattern of thieving lines is generated by computer-aided design techniques and also includes provisions for gaps in thieving lines in one layer so as to eliminate crossover coupling with another layer and provides for visual identification of the thieving lines by the use of an undulating pattern.

Growing community of inventors

Los Altos, CA, United States of America

Scott M Westbrook