Semiconductor Energy Laboratory Co., Ltd.

Tdk Corporation

Nippon Telegraph and Telephone Corporation

Ajinomoto Co., Ltd.

Socionext Inc.

Hitachi Global Storage Technologies Netherlands B.v.

Hgst Netherlands, B.v.

Ea Pharma Co., Ltd.

Satoru Okamoto

Shunpei Yamazaki

Shinya Sasagawa

Motomu Kurata

Ryota Hodo

Yuya Ishima

Hajime Kato

Yuto Shiga

Kazuya Tobita

Youichi Kazuta

Hajime Kimura

Kiyoshi Kato

Takanori Matsuzaki

Yuta Endo

Shigeharu Monoe

Shunji Aoki

Eiji Oki

Manabu Kitazawa

Masaru Katayama

Akira Misawa

Yoko Kuriyama

Nao Sugimoto

Akihisa Shimomura

Yoshinobu Asami

Yutaka Okazaki

Katsuaki Tochibayashi

Sho Senda

Ikue Harata

Takashi Suzuki

Tatsuya Onuki

Takahiro Sato

Katsuro Watanabe

Yoshikazu Sakaguchi

Akihiro Ishizuka

Naoyuki Fukuchi

Naoyuki Yamada

Yuta Iida

Takao Ikenoue

Masaru Takayanagi

Shusaku Umemoto

Wataru Miyanaga

Sen Takeshita

Yumiko Fukuda

Naoko Arashida

Hideomi Suzawa

Hideto Ohnuma

Hideki Uochi

Hiromichi Godo

Yuki Okamoto

Takashi Hamada

Kazuya Hanaoka

Naoaki Yamanaka

Nobuo Yoshida

Teruyuki Fujii

Hiroaki Honda

Seiji Goto

Ken-ichi Sato

Takashi Yokoshima

Eiichi Nimoda

Satoru Ohashi

Shuuichi Kojima

Tomomi Yoshida

Koichiro Tanaka

Daisuke Matsubayashi

Takuya Tsurume

Atsushi Watanabe

Shinichi Sato

Katsumi Abe

Yuichi Yanagisawa

Hitoshi Kunitake

Ryo Tokumaru

Makoto Yoshino

Hidekazu Sato

Hiroyuki Katada

Noriaki Hamachi

Yoji Tozawa

Kunihiko Kawasaki

Daigo Ito

Kohei Shiomoto

Wataru Imajuku

Kazuki Tsuda

Keiichi Sekiguchi

Kouzou Sasaki

Koji Okazaki

Katsuhiro Shimano

Yoshinori Mochizuki

Takuro Kanemura

Kenichi Satou

Shuumi Kumagai

Kouji Okazaki

Masahiro Kato

Masahiro Ousugi

Michiru Ishifune

Yasuo Nishiguchi

Atsuya Tokinosu

Takuya Matsumoto

Takashi Okuda

Shuichi Yamane

Taisuke Higashi

A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. The first conductor is provided with a first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator provided therebetween. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

Memory device

A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a first insulator, a first oxide over the first insulator, a second insulator provided between the first insulator and the first oxide, a second oxide in contact with the first insulator and in contact with a side surface of the first oxide, and a third insulator over the first insulator, the second oxide, and the first oxide. The third insulator includes a region in contact with a top surface of the first oxide. The second insulator and the third insulator include a material which is less likely to pass oxygen than the second oxide.

Semiconductor device comprising oxygen blocking films

A medium which contains a riboflavin derivative is useful for proliferating and culturing pluripotent stem cells such as iPS cells and ES cells, and is free from degradation due to storage as complete medium.

Riboflavin derivative-containing medium

A semiconductor device having a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening; a first conductor including a second opening over the first insulator; a second insulator including a third opening over the first conductor; a third insulator provided along a first side surface of the first opening, a second side surface of the second opening, and a third side surface of the third opening; an oxide provided along the first side surface, the second side surface, and the third side surface with the third insulator therebetween; a second conductor provided at the first side surface with the third insulator and the oxide therebetween; and a third conductor provided at the third side surface with the third insulator and the oxide therebetween, the oxide includes a first region in the first opening, a second region in the second opening, and a third region in the third opening, and the second region has higher resistance than the first region and the third region.

Semiconductor device and method for manufacturing semiconductor device

A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.

Semiconductor device and manufacturing method thereof

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes an oxide; a first conductor and a second conductor provided apart from each other over the oxide; a third conductor including a region that is over the oxide and overlaps with a region between the first conductor and the second conductor; a first insulator over the third conductor; a fourth conductor that is electrically connected to the first conductor through a first opening provided in the first insulator; a second insulator that is provided over the first insulator and that is provided over the fourth conductor in the first opening; a fifth conductor overlapping with the fourth conductor with the second insulator positioned therebetween in the first opening; and a sixth conductor electrically connected to the second conductor in a second opening provided in the first insulator and the second insulator. The fifth conductor and the sixth conductor are in contact with a top surface of the second insulator over the first insulator.

A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

A data processing system, a data processing device, and a data processing method are provided. The data processing system includes a wearable device including a display means and an imaging means and a database that is connected to the wearable device through a network. The database includes at least one of pieces of information on a cooking recipe, a cooking method, and a material. The wearable device detects a first material by the imaging means. The wearable device collects information on the first material from the database. When the first material exists in a specific region in an imaging range of the imaging means, the information on the first material is displayed on the display means. When the first material does not exist in the specific region, the information on the first material is not displayed on the display means.

Data processing system and data processing method

A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.

Method for fabricating electrode and semiconductor device

First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.

Semiconductor device and method for manufacturing the semiconductor device

A laminated coil component includes an element body, a coil, and a pair of conductors. The pair of conductors is disposed on the element body. Each of the pair of conductors has an L shape when viewed from the third direction. Each of the pair of conductors includes a first conductor portion and a second conductor portion. The first conductor portion is disposed on one of first side faces. The second conductor portion is disposed on a pair of end faces. The coil includes a first coil portion and a second coil portion. The first coil portion includes a first straight portion and a pair of second straight portions. The pair of second straight portions is connected to both ends of the first straight portion. The second coil portion is curved as a whole.

Laminated coil component

A laminated coil componentincludes an element body, a coildisposed in the element body, and a first external electrodeand a second external electrode, and at least a part of the coilis disposed in a first region Aand a second region Awhen seen in a facing direction of the pair of side surfacesand, and the coilis not disposed in a third region Aand a fourth region Awhen seen in the facing direction of the pair of side surfacesand

Coil component

A laminated electronic component includes an element body and a conductor. The element body is formed by laminating a plurality of element-body layers. The element body has a first face, a second face, and a pair of third faces. The conductor is disposed on the element body and has an L shape. The conductor has an exposed face exposed on the first face and the second face. The exposed face includes a plurality of divided regions divided by the element body. The length of each divided region in a dividing direction is longer than a distance with which the plurality of divided regions is separated from each other and longer than a distance with which the exposed face and the pair of third faces are separated from each other.

Laminated electronic component

Growing community of inventors

Kanagawa, Japan

Satoru Okamoto