Intel Corporation

Cree Gmbh

Sarah Kay Haney

Feras Eid

Sasha N Oster

Weng Hong Teh

Kyu Oh Lee

Telesphor Kamgaing

Sei-Hyung Ryu

Adel A Elsherbini

Anant Kumar Agarwal

Qingchun Zhang

Tarek A Ibrahim

Brett Hull

Daniel N Sobieski

Daniel Namishia

Parshuram Balkrishna Zantye

Chad E Mair

Embodiments of the invention describe hermetic encapsulation for MEMS devices, and processes to create the hermetic encapsulation structure. Embodiments comprise a MEMS substrate stack that further includes a magnet, a first laminate organic dielectric film, a first hermetic coating disposed over the magnet, a second laminate organic dielectric film disposed on the hermetic coating, a MEMS device layer disposed over the magnet, and a plurality of metal interconnects surrounding the MEMS device layer. A hermetic plate is subsequently bonded to the MEMS substrate stack and disposed over the formed MEMS device layer to at least partially form a hermetically encapsulated cavity surrounding the MEMS device layer. In various embodiments, the hermetically encapsulated cavity is further formed from the first hermetic coating, and at least one of the set of metal interconnects, or a second hermetic coating deposited onto the set of metal interconnects.

Hermetic encapsulation for microelectromechanical systems (MEMS) devices

Embodiments of a semiconductor device including a floating bond pad are disclosed. In one preferred embodiment, the semiconductor device is a power semiconductor device. In one embodiment, the semiconductor device includes a substrate that includes an active area and a control contact area, a first bond pad on the active area, a floating control bond pad on the control contact area and laterally extending over a portion of the first bond pad, and a dielectric between the portion of the first bond pad and the floating control bond pad. The floating control bond pad enables the active area to extend below the floating control bond pad, which in turn decreases a size of the power semiconductor device for a particular rated current or, conversely, increases a size of the active area and thus a rated current for a particular semiconductor die size.

Floating bond pad for power semiconductor devices

A method including disposing a transmission line or an antenna on dielectric material; and removing a portion of the dielectric material from a region adjoining the transmission line or the antenna where the electromagnetic radiation from the transmission line or the antenna is predetermined to be greater than another portion of the dielectric material. An apparatus including a package substrate including a transmission line coupled to an antenna, the transmission line and the antenna disposed on a dielectric layer including an organic dielectric material having a first dielectric constant and a second material having a dielectric constant less than the first dielectric constant, wherein the second dielectric material adjoins a portion of the transmission line or the antenna.

mmWave antennas and transmission lines on standard substrate materials

Magnet placement is described for integrated circuit packages. In one example, a terminal is applied to a magnet. The magnet is then placed on a top layer of a substrate with solder between the terminal and the top layer, and the solder is reflowed to attach the magnet to the substrate.

Magnet placement for integrated sensor packages

Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure.

Device, system and method for providing MEMS structures of a semiconductor package

A pressure sensor is integrated into an integrated circuit fabrication and packaging flow. In one example, a releasable layer is formed over a removable core. A first dielectric layer is formed. A metal layer is patterned to form conductive metal paths and to form a diaphragm with the metal. A second dielectric layer is formed over the metal layer and the diaphragm. A second metal layer is formed to connect with formed vias and to form a metal mesh layer over the diaphragm. The first dielectric layer is etched under the diaphragm to form a cavity and the cavity is covered to form a chamber adjoining the diaphragm.

Integration of pressure sensors into integrated circuit fabrication and packaging

Magnetic field shielding material with high relative permeability incorporated into a build-up package, for example to restrict a field of a magnet integrated with the build-up to a target device configured to operate in the field. In embodiments, a first device is physically coupled to the build-up. In embodiments, a magnetic field shielding material is disposed in contact with the build-up and in proximity to the first device to restrict a magnetic field either to a region occupied by the first device or to a region exclusive of the first device. A field shielding material may be disposed within build-up near a permanent magnet also within the build-up to reduce exposure of another device, such as an IC, to the magnetic field without reducing MEMS device exposure.

Magnetic field shielding for packaging build-up architectures

An electronic device includes a silicon carbide layer having a first conductivity type and having a first surface and a second surface opposite the first surface, and first and second silicon carbide Zener diodes on the silicon carbide layer. Each of the first and second silicon carbide Zener diodes may include a first heavily doped silicon carbide region having a second conductivity type opposite the first conductivity type on the silicon carbide layer, and an ohmic contact on the first heavily doped silicon carbide region.

Bidirectional silicon carbide transient voltage supression devices

The integration of pressure or inertial sensors into an integrated circuit fabrication and packaging flow is described. In one example, a diaphragm is formed by depositing a metal over a first dielectric layer. A second dielectric layer is formed over the diaphragm. A metal mesh layer is formed over the second dielectric. The first dielectric layer is etched under the diaphragm to form a cavity. The cavity is lined with a sealing layer. The cavity is covered to form a chamber adjoining the diaphragm, and the cover is sealed against the cavity.

Integration of pressure or inertial sensors into integrated circuit fabrication and packaging

Bidirectional silicon carbide transient voltage suppression devices

The invention is a device for controlling conduction across a semiconductor body with a P type channel layer between active semiconductor regions of the device and the controlling gate contact. The device, often a MOSFET or an IGBT, includes at least one source, well, and drift region. The P type channel layer may be divided into sections, or divided regions, that have been doped to exhibit N type conductivity. By dividing the channel layer into regions of different conductivity, the channel layer allows better control over the threshold voltage that regulates current through the device. Accordingly, one of the divided regions in the channel layer is a threshold voltage regulating region. The threshold-voltage regulating region maintains its original P type conductivity and is available in the transistor for a gate voltage to invert a conductive zone therein. The conductive zone becomes the voltage regulated conductive channel within the device.

Growing community of inventors

Cary, NC, United States of America

Sarah Kay Haney