Samsung Electronics Co., Ltd.

Sang-Yeop Lee

Min-Il Kim

In-Ku Kang

Cheul-Joong Youn

Jin-Ho Kim

Dong-Kuk Kim

Sang-Ho An

Chang-Cheol Lee

Hee-Kook Choi

A method and apparatus of fabricating a semiconductor device by back grinding and dicing is disclosed. The method may include at least adhering a protection tape for back grinding on a front surface of a semiconductor wafer, back grinding a rear surface of the semiconductor wafer while the protection tape faces downward, loading the semiconductor wafer to dicing equipment when the front surface having the protection tape faces downward, detecting a dicing position formed on the front surface of the semiconductor wafer, and dicing the semiconductor wafer with the protection tape adhering thereon into individual semiconductor chips in accordance with the detected dicing position. The dicing equipment may have a transparent aligning part for aligning the semiconductor wafer and a chuck part for supporting the semiconductor wafer.

Method and apparatus of fabricating a semiconductor device by back grinding and dicing

The invention provides a semiconductor chip package, and a means of forming such a semiconductor chip package, in which one or more semiconductor chips are electrically connected to a mounting substrate by wire bonding in which an adhesive tape is provided on the active surface of the semiconductor chips for encapsulating at least an upper portion of the bonding wires adjacent the active surfaces to improve the stability of the bonding wires during subsequent processing.

Semiconductor chip package having an adhesive tape attached on bonding wires

In an embodiment of the invention an apparatus is configured to stack a plurality of semiconductor chips having the same or similar size. The apparatus includes a tape providing unit for providing an insulating adhesive tape, a tape attaching device for attaching the insulating adhesive tape to an area between electrode pads of a first chip, and a chip attaching device for attaching a second chip to the insulating adhesive tape.

Apparatus for bonding a chip using an insulating adhesive tape

A method of wire bonding, a semiconductor chip, and a semiconductor package provides stitch-stitch bonds of a wire on a bond pad of a chip as well as on a bond position of a substrate. A ball-stitch bump is formed on an end of the wire extending from a capillary or provided on the bond pad of the chip. A ball-stitch bump is formed on the bond pad of the chip by pressing down the ball of the wire on the bond pad. A ball-stitch stitch bond of the wire is formed on the ball-stitch bump by pressing down the wire on the ball-stitch bump. The capillary is moved from the bond pad to the bond position, while loosening the wire. A stitch bond of the wire is formed on the bond position by pressing down the wire on the bond position, and then separated from the wire within the capillary. The method of wire bonding, a semiconductor chip, and a semiconductor package can reduce or minimize a moving path of the capillary and provide more effective wire bonding.

Wire bonding method, semiconductor chip, and semiconductor package

Provided herein are multi-chip modules (MCMs) having bonding wires and fabrication methods thereof. The multi-chip module includes a substrate and a plurality of chips sequentially stacked. At least one top chip, stacked above a lowest chip, has an insulating film that covers the backside thereof. Also, each of the stacked chips has bonding pads formed on the periphery or edges of its upper surface. At least one insulator is interposed between the stacked chips. The insulator exposes the pads on the underlying chip. The pads of the respective chips are connected to a set of interconnections, which are disposed on the substrate. This configuration of stacked chips enables the overall height of the memory module to be reduced because the insulating film prevents the bonding wires from contacting the substrate of the top chips.

Growing community of inventors

Cheonan-si, South Korea

Sang-Yeop Lee